Dual link DVI transmitter serviced by single Phase Locked Loop

Details Dual link DVI transmitter serviced by single Phase Locked Loop Dual link DVI transmitter serviced by single Phase Locked Loop

2006-10-10

2006-10-10

Fan, Chieh M. (Department: 2611)

Pulse or digital communications

Transmitters

C375S256000, C375S257000

Reexamination Certificate

active

07120203

ABSTRACT:
A dual link transmitter constructed according to the present invention employs a single Phase Locked Loop (PLL) to service both a primary link and a secondary link during dual link mode operations. The structure of the dual link transmitter includes both a primary link PLL and a secondary link PLL. The primary link PLL produces a primary link clock and the secondary link PLL produces a secondary link clock. During dual single link operations, the primary link clock is used to service the primary link while the secondary link clock is used to service the secondary link. However, during dual link operations, the primary link clock is used to service both the primary link and the secondary link.

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Digital Display Working Group, Digital Visual Interface DVI Revision 1.0, Apr. 2, 1999.

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