Dual instruction buffers with a bypass bus and rotator for a dec

Details Dual instruction buffers with a bypass bus and rotator for a dec Dual instruction buffers with a bypass bus and rotator for a dec

1997-02-24

1998-12-01

Meung, Zarni

395384, 395390, G06F 938

Patent

active

058451005

ABSTRACT:
A circuit and method for supplying a block of instruction code to an instruction buffer for an instruction decoder. A block of instruction code is fetched and input through a buffer input. A first instruction buffer and a second instruction buffer are coupled to the buffer input to store the block of instruction code. The output of the instruction buffers and a bypass bus coupled to the buffer input are input into an instruction buffer multiplexer. The instruction buffer multiplexer selects among the three inputs and outputs two blocks of instruction code to a rotator. The rotator receives an input pointer indicative of an initial byte. The rotator outputs a block of instruction code beginning at the initial byte to an instruction decoder.

REFERENCES:
patent: 4394736 (1983-07-01), Bernstein et al.
patent: 4399505 (1983-08-01), Druke et al.
patent: 4591972 (1986-05-01), Guyer et al.
patent: 4654781 (1987-03-01), Schwartz et al.
patent: 4745544 (1988-05-01), Renner et al.
patent: 4928223 (1990-05-01), Dao et al.
patent: 5113515 (1992-05-01), Fite et al.
patent: 5125083 (1992-06-01), Fite et al.
patent: 5129067 (1992-07-01), Johnson
patent: 5168571 (1992-12-01), Hoover et al.
patent: 5202967 (1993-04-01), Matsuzaki et al.
patent: 5222244 (1993-06-01), Carbine et al.
patent: 5233694 (1993-08-01), Hotta et al.
patent: 5233696 (1993-08-01), Suzuki
patent: 5293592 (1994-03-01), Fu et al.
patent: 5371864 (1994-12-01), Chung
patent: 5463748 (1995-10-01), Schwendinger
patent: 5581718 (1996-12-01), Grochowski
patent: 5608885 (1997-03-01), Gupta et al.
Popescu, et al. "The Metaflow Architecture", IEEE 1991, pp. 10-13 and pp. 63-73.
Johnson, Mike, "Superscalar Microprocessor Design", Prentice Hall, Inc, 1991, pp. 1-287.

Affiliated with

Also associated with

Rating

Dual instruction buffers with a bypass bus and rotator for a dec does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual instruction buffers with a bypass bus and rotator for a dec, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual instruction buffers with a bypass bus and rotator for a dec will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2402246