Dual input watchdog timer

Details Dual input watchdog timer Dual input watchdog timer

1982-11-12

1985-08-27

Fleming, Michael R.

Excavating

371 12, G06F 1104

Patent

active

045382735

ABSTRACT:
A dual input watchdog timer for a processor having a dual input circuit with first and second inputs and an output, the first and second inputs receiving signals from different software modules of the processor and the output for supplying a reinitialization signal to the processor if the dual input circuit improperly receives the signals to its inputs within a predetermined amount of time.

REFERENCES:
patent: 4072852 (1978-02-01), Hogan et al.
patent: 4090239 (1978-05-01), Twibell et al.
patent: 4118792 (1978-10-01), Struger et al.
patent: 4162526 (1979-07-01), Gass et al.
patent: 4270168 (1981-05-01), Murply et al.
patent: 4339801 (1982-07-01), Hosaka et al.
patent: 4354248 (1982-10-01), Conger et al.

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