Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Field effect device in non-single crystal – or...
Reexamination Certificate
2005-08-30
2005-08-30
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Non-single crystal, or recrystallized, semiconductor...
Field effect device in non-single crystal, or...
C257S344000, C438S048000, C438S307000, C349S042000, C349S044000
Reexamination Certificate
active
06936848
ABSTRACT:
A dual gate layout of a thin film transistor of liquid crystal display to alleviate dark current leakage is disclosed. The layout comprises (1) a polysilicon on a substrate having a L-shaped or a snake shaped from top-view, which has a heavily doped source region, a first lightly doped region, a first gate channel, a second lightly doped region, a second gate channel, a third lightly doped region and a heavily doped drain region formed in order therein; (2) a gate oxide layer formed on the polysilicon layer and the substrate, (3) a gate metal layer then formed on the gate oxide layer having a scanning line and an extension portion with a L-shaped or an I-shaped. The gate metal intersects with the polysilicon layer thereto define the forgoing gate channels. Among of gate channels, at least one is along the signal line, which is connected to the source region through a source contact.
REFERENCES:
patent: 5693959 (1997-12-01), Inoue et al.
patent: 6573955 (2003-06-01), Murade
patent: 6831295 (2004-12-01), Tsubo
patent: 2001117115 (2001-04-01), None
Li Chun-Sheng
Sun Wein-Town
Yu Jian-Shen
AU Optronics Corp.
Tran Long
Troxell Law Office PLLC
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