Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With large area flexible electrodes in press contact with...
Patent
1987-09-21
1989-05-30
Carroll, J.
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With large area flexible electrodes in press contact with...
257 234, 257 22, 257 55, H01L 2978, H01L 2980, H01L 2906
Patent
active
048355860
ABSTRACT:
A dual-gate vertical field effect transistor comprises an N+ substrate (102) which serves as a drain, and N-epitaxial layer (104) formed on the N+ substrate, and an N+ layer (106) formed at the surface of the epitaxial layer which serves as a source. A plurality of grooves (108a, 108b) extends through the N+ region and a portion of the N-layer. The grooves are lined with an insulating layer (110a, 110b) and filled with a conductive polysilicon gate (112a, 112b). Underneath each of the grooves is a P+ region (116a, 116b) which serves as a second gate. Thus, the transistor in accordance with the present invention includes a set of polysilicon gates and a set of P+ gates for independently modulating the current permitted to flow between the transistor source and drain.
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Blanchard Richard A.
Cogan Adrian I.
Carroll J.
Ngo Ngan Van
Siliconix incorporated
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