Dual function clock signal suitable for host control of...

Details Dual function clock signal suitable for host control of... Dual function clock signal suitable for host control of...

2007-12-11

2007-12-11

Ha, Dac V. (Department: 2611)

Pulse or digital communications

Repeaters

Ring or star configuration

C375S214000, C375S354000, C370S270000, C370S362000, C370S390000

Reexamination Certificate

active

10394843

ABSTRACT:
A host device in a data communication system provides a dual-function clock/enable signal at a single output port shared by at least one asynchronous target device and at least one synchronous target device. In the asynchronous operating mode, the host device generates an asynchronous gated-clock signal that facilitates read/write functions of one or more selected asynchronous target devices. In the synchronous operating mode, the host device generates a synchronous clock-gate signal that facilitates read/write functions of one or more selected synchronous target devices. The target devices and the host device share both a common data bus and a common clock bus. The host device supplies the dual-function clock/enable signal on the common clock bus.

REFERENCES:
patent: 5339395 (1994-08-01), Pickett et al.
patent: 5434996 (1995-07-01), Bell
patent: 5574726 (1996-11-01), Chan et al.
patent: 5671249 (1997-09-01), Andersson et al.
patent: 7010621 (2006-03-01), Calkins et al.

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