Dual-frequency matching circuit

Details Dual-frequency matching circuit Dual-frequency matching circuit

2009-01-12

2009-12-29

Jones, Stephen E (Department: 2817)

Wave transmission lines and networks

Coupling networks

With impedance matching

C333S126000

Reexamination Certificate

active

07639099

ABSTRACT:
The connection topology of input terminals2, elements4a, 4b, 4cand4dand load5is designed similarly to a so-called “seven-segment display”, which is often used to display numerals on an electronic calculator or a digital watch. More specifically, suppose in the three horizontally running segments, the top and bottom segments are associated with the input terminals2and the load5is allocated to one of the four vertically running segments. Then, the three other vertical segments and the other horizontal segment are associated with the elements4a, 4b, 4cand4d, which are an inductor with an inductance of 5.119 nH, a capacitor with a capacitance of 1.370 pF, an inductor with an inductance of 8.360 nH and a capacitor with a capacitance of 5.942 pF, respectively. By adopting this circuit configuration, the total number of elements can be reduced to four and the lossc can be reduced significantly. In addition, since the resonant circuits can be eliminated and the size of the ladder circuit can be reduced, impedance matching is achieved with a high degree of stability.

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