Dual flip-flop detector type phase locked loop incorporating dyn

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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331 17, 331 25, 331 27, H03L 7093

Patent

active

056636857

ABSTRACT:
Compensation circuits are disclosed for correcting phase offset during apparent phase lock of a dual flip-flop phase detector type of phase locked loop, which phase offset is due to circuit delays in the phase detector. Simultaneous "pump up" and "pump down" signals, present even during apparent phase lock because of such circuit delays, are peak sampled through long lime constant filters and summed to derive a compensating signal which is applied to the reference input to the differential amplifier which controls the local oscillator, thereby exactly counteracting the offset component of the voltage appearing at the signal input to the differential amplifier which is developed during normal operation of the phase detector, filter and summing circuit of the phase locked loop at apparent phase lock.

REFERENCES:
patent: 4599570 (1986-07-01), Cloke

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