Electricity: electrical systems and devices – Safety and protection of systems and devices – Transient responsive
Reexamination Certificate
2002-04-01
2004-05-04
Salata, Jonathan (Department: 2837)
Electricity: electrical systems and devices
Safety and protection of systems and devices
Transient responsive
C361S091200
Reexamination Certificate
active
06731488
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The invention relates to a method and circuit design for providing electrostatic discharge (ESD) protection for a circuit including a transistor. Specifically, the invention uses a second emitter of a dual emitter transistor to provide an alternative current path to safely dissipate an ESD event.
2. Background Art
In electronic circuitry, ESD events can cause elements of circuitry to fail due to current overloading or reverse bias. For example, the propagation of an ESD event through a circuit may cause an emitter-base junction on a bipolar transistor to become heavily reverse biased and subsequently fail. The voltage required for failure is linearly proportional to the area of the emitter. Consequently, the potential for failure increases as circuitry, and therefore the area of the emitter, becomes smaller.
A common circuit design facing this problem is a differential circuit. In this circuit, two transistors have bases coupled to different voltage pads and their emitters coupled together. The collectors of each transistor as well as the emitters can then be coupled to additional circuitry. In normal operation for radio frequency (RF) applications, the voltage difference between the voltage pads remains within a fraction of a volt. Consequently, any reverse bias on either of the transistors is insufficient to cause failure of the emitter-base junction.
However, an ESD event on one voltage pad may cause a large voltage difference between the two voltage pads. ESD failure can occur due to the reverse or forward biasing of a transistor in the differential pair relative to a power supply or to another pad as the grounded reference voltage. Additionally, failure can occur across the differential pair. For example, the transistor coupled to the voltage pad on which the ESD event occurs may survive the event, however, the opposite transistor can become reverse biased at the emitter-base junction and may fail. A similar situation arises when the differential circuit requires pad-to-pad ESD testing. In this instance, a positive or negative voltage is applied to one voltage pad while the other voltage pad is grounded. The failure level for this circuitry can range from 100 to 400 Volts for RF circuits, to 4,000 to 10,000 Volts when Complementary Metal Oxide Semiconductor (CMOS) technology is used.
One potential solution is to provide ESD protection external to the differential circuit. However, this may adversely effect the loading capacitance, speed, linearity and operating point of the circuitry, coupling with the power supply, frequency response, circuit stability, slew rate, etc. which is unacceptable for many applications. Another possible solution is to make the emitter larger so that larger voltages can be withstood. This solution adversely effects the performance and is frequently unacceptable for many applications. ESD protection circuitry can also be placed on the functional circuit path. However, here again the extra loading and capacitance is unacceptable for some applications.
Consequently, there exists a need for a method and circuit design that provide an alternate current path to dissipate an ESD event without adversely impacting the performance of the functional circuit path during normal operation.
BRIEF SUMMARY OF THE INVENTION
Summary of the Invention
The current invention provides a method and circuit design that provides protection from ESD events without adversely impacting the performance of the functional circuit path during normal operation.
A first aspect of the invention provides a transistor comprising: a first emitter for providing bipolar operation; and a second emitter for providing ESD protection.
A second aspect of the invention provides a method of providing ESD protection comprising: providing a transistor having a first emitter and a second emitter; and coupling the second emitter to an ESD protection circuit.
A third aspect of the invention provides a differential circuit comprising: a first transistor having a base coupled to a first voltage pad, a first emitter and a second emitter; and a second transistor having a base coupled to a second voltage pad, a first emitter coupled to the first emitter of the first transistor, and a second emitter; wherein the second emitter of the first transistor and the second emitter of the second transistor provide ESD protection.
The exemplary aspects of the present invention are designed to solve the problems herein described and other problems not discussed, which are discoverable by a skilled artisan.
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Hoffman, Warnick & D'Alessandro LLC
LaBatt John W.
Salata Jonathan
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