Dual edge-triggered digital storage element and method therefor

Details Dual edge-triggered digital storage element and method therefor Dual edge-triggered digital storage element and method therefor

1992-03-20

1993-01-12

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307279, 307481, 307269, H03K 3356

Patent

active

051792958

ABSTRACT:
A dual edge-triggered digital storage element is disclosed. This storage element operates much like a standard digital latch, with the exception that the data input is clocked to the output on both the rising and the falling edge of the clock input. This allows the frequency of the clock signal to be reduced by half, reducing system complexity and reducing power consumption.

REFERENCES:
patent: 4066919 (1978-01-01), Huntington
patent: 4607173 (1986-08-01), Knoedl, Jr.
patent: 4629909 (1986-12-01), Cameron
patent: 4756006 (1988-07-01), Rickard
patent: 4873456 (1989-10-01), Olisar et al.

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