Dual damascene process for metal layers and organic intermetal l

Details Dual damascene process for metal layers and organic intermetal l Dual damascene process for metal layers and organic intermetal l

1997-09-30

2000-05-23

Utech, Benjamin L.

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

438723, 438724, 438733, H01L 21302, H01L 21461

Patent

active

060665696

ABSTRACT:
A process for the manufacture of silicon integrated circuits uses a dual damascene metallization process with an organic intermetal dielectric (14). A pattern to be etched is first etched in a hard mask (16) without exposing the underlying intermetal dielectric (14) and then transferred into the intermetal dielectric (14) on an enlarged scale.y

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