Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1998-03-31
2000-03-14
Thomas, Tom
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257751, 257752, 257759, 257762, 257774, H01L 2348
Patent
active
060376643
ABSTRACT:
A technique for fabricating a dual damascene interconnect structure using a low dielectric constant material as a dielectric layer or layers. A low dielectric constant (low-.epsilon.) dielectric material is used to form an inter-level dielectric (ILD) layer between metallization layers and in which via and trench openings are formed in the low-.epsilon. ILD. The dual damascene technique allows for both the via and trench openings to be filled at the same time.
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Horwath Ronald S.
Seidel Thomas E.
Vasudev Prahalad K.
Zeitzoff Peter M.
Zhao Bin
Thomas Tom
Vu Hung Kim
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