Dual channel pulse width detector having delay and D.C. offset m

Details Dual channel pulse width detector having delay and D.C. offset m Dual channel pulse width detector having delay and D.C. offset m

1976-04-09

1977-03-29

Grimm, Siegfried H.

Demodulators

Amplitude modulation demodulator

Having specific distortion, noise or other interference...

307234, 328112, H03K 908

Patent

active

040152111

ABSTRACT:
A first and second channel coupled to a leading edge comparator and a trailing edge comparator is provided wherein pulses having widths to be determined are transmitted to the comparators, the pulses in one channel emanating therefrom being delayed with respect to pulses emanating from the other channel. Biasing circuitry produces an offset bias voltage to change the relative D.C. levels of the pulses, thereby to establish two leading edge crossover points which effect operation of the leading edge comparator and two trailing edge crossover points which effect operation of the trailing edge comparator so that the time differences between pulses produced by the comparators is a measure of the widths of the pulses, regardless of changes in pulse amplitude, D.C. input drift, and changes in duty cycle.

REFERENCES:
patent: 3413412 (1968-11-01), Townsend
patent: 3528019 (1970-09-01), Inoue
patent: 3571736 (1971-03-01), West

Affiliated with

Also associated with

Rating

Dual channel pulse width detector having delay and D.C. offset m does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Dual channel pulse width detector having delay and D.C. offset m, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual channel pulse width detector having delay and D.C. offset m will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-551223