Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Reexamination Certificate
2011-05-24
2011-05-24
Sandvik, Benjamin P (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
C257SE27103
Reexamination Certificate
active
07948052
ABSTRACT:
A dual-bit memory device is provided which includes trench isolation material disposed near bit line contact areas. For example, in one implementation a semiconductor memory device is provided in which each memory cell can store two bits of information. The memory device comprises a substrate, first and second buried bit lines in the substrate, a first bit line contact on the first buried bit line, a second bit line contact on the second buried bit line, and an insulator region disposed in the substrate between the first buried bit line and the second buried bit line. The insulator region prevents a current from flowing between the first buried bit line and the second buried bit line.
REFERENCES:
patent: 6232181 (2001-05-01), Lee
patent: 6271088 (2001-08-01), Liu et al.
patent: 6492677 (2002-12-01), Takahashi et al.
patent: 6587387 (2003-07-01), Fan et al.
patent: 6828623 (2004-12-01), Guo et al.
patent: 2003/0141532 (2003-07-01), Kato
patent: 2004/0079984 (2004-04-01), Kao et al.
patent: 2004/0082198 (2004-04-01), Nakamura et al.
patent: 2004/0252541 (2004-12-01), Yang et al.
patent: 2005/0006694 (2005-01-01), Liu
patent: 2005/0014338 (2005-01-01), Kim et al.
patent: 2006/0131613 (2006-06-01), Kim et al.
patent: 10246343 (2004-04-01), None
patent: 11186528 (1999-07-01), None
patent: 2003224213 (2003-08-01), None
patent: 2004039866 (2004-02-01), None
patent: 2004111737 (2004-04-01), None
patent: 2004193178 (2004-07-01), None
patent: 2004349312 (2004-12-01), None
Chang et al. “New Buried Bit-line NAND (BiNAND) Flash Memory for Data Storage.” 2003 Symposium on VLSI Technology Digest of Technical Papers. pp. 95-96.
Kuo W. Wendy
Sandvik Benjamin P
Spansion LLC
LandOfFree
Dual-bit memory device having trench isolation material... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Dual-bit memory device having trench isolation material..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Dual-bit memory device having trench isolation material... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2674599