Dual-array register file with overlapping window registers

Details Dual-array register file with overlapping window registers Dual-array register file with overlapping window registers

1993-02-03

1995-02-21

Harvey, Jack B.

Static information storage and retrieval

Magnetic bubbles

Guide structure

395425, 395DIG1, 36523003, G06F 1202, G06F 1300, G11C 1134

Patent

active

053924118

ABSTRACT:
In a register file having an overlap-window arrangement in which 64 registers are divided into eight windows W0 to W7 each containing 16 registers R0 to R15, memory cells are divided into two memory cell arrays, i.e., a first memory cell array containing registers R0 to R7 of odd-numbered windows (or registers R8 to R15 of even-numbered windows), and a second memory cell array containing registers R0 to R7 of even-numbered windows (or registers R8 to R15 of odd-numbered windows). Each of the registers has one read word line. According to the exclusive logical sum of the least significant bit of a window No. signal and the most significant bit of a register address signal, an output selection circuit selects one of two data simultaneously read from the two memory cell arrays. There is thus provided a register file which is small in circuit scale and assures high-speed reading.

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"The SPARC Architecture Manual", Sun Microsystems Inc., Version 8, 1990, pp. 23-27.

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