Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...
Reexamination Certificate
2000-02-26
2003-08-12
Pan, Daniel H. (Department: 2183)
Electrical computers and digital processing systems: processing
Processing architecture
Microprocessor or multichip or multimodule processor having...
C712S221000, C712S222000, C708S503000, C708S501000
Reexamination Certificate
active
06606700
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
This invention relates to digital signal processors, and has particular relation to multiply-accumulate (MAC) units.
2. Background Art
Digital Signal Processors (DSPs) are specialized types of microprocessors that are specifically tailored to execute mathematical computations very rapidly. DSPs can be found in a variety of applications including compact disk players, PC disk drives, telecommunication modem banks, and cellular telephones.
In the cellular telephone context, the demand for DSP computation capability continues to grow, driven by the increasing needs of applications such as GPS position location, voice recognition, low-bit rate speech and audio coding, image and video processing, and 3G cellular modem processing. To meet these processing demands, there is a need for improved digital signal processor architectures that can process computations more efficiently.
Considerable work has been done in these areas. Applicant Sih is also an applicant in the following applications for United States patents:
“Multiple Bus Architecture in a Digital Signal Processor”, Ser. No. 09/044,087, filed Mar. 18, 1998 now abandoned;
“Digital Signal Processor Having Multiple Access Register”, Ser. No. 09/044,088, filed Mar. 18, 1998 U.S. Pat. No. 6,496,920;
“Memory Efficient Instruction Storage”, Ser. No. 09/044,089, filed Mar. 18, 1998 now abandoned;
“Highly Parallel Variable Length Instructions for Controlling a Digital Signal Processor”, Ser. No. 09/044,104, filed Mar. 18,1998 now abandoned ;
“Variable Length Instruction Decoder”, Ser. No. 09/044,086, filed Mar. 18,1998 now U.S. Pat. No. 6,425,070;
“Digital Signal Processor with Shiftable Multiply Accumulate Unit”, Ser. No. 09/044,108, filed Mar. 18,1998 now abandoned.
The disclosure of these applications is incorporated herein by reference.
BRIEF DISCLOSURE OF THE INVENTION
The invention is a digital signal processor architecture that is designed to speed up frequently-used signal processing computations, such as FIR filters, correlations, FFTs, and DFTs. The architecture uses a coupled dual-MAC architecture and attaches a dual-MAC coprocessor onto it in a unique way to achieve a significant increase in processing capability.
REFERENCES:
patent: 4766564 (1988-08-01), DeGroot
patent: 6418527 (2002-07-01), Rozenshein et al.
Kumar Hemant
Lee Way-Shing
Sih Gilbert C.
Brown Charles D.
Pan Daniel H.
Qualcomm Incorporated
Seo Howard H.
Wadsworth Philip R.
LandOfFree
DSP with dual-mac processor and dual-mac coprocessor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with DSP with dual-mac processor and dual-mac coprocessor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and DSP with dual-mac processor and dual-mac coprocessor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3130972