DS-CDMA receiver with multi-stage serial interference cancelers

Details DS-CDMA receiver with multi-stage serial interference cancelers DS-CDMA receiver with multi-stage serial interference cancelers

1997-06-10

1999-09-14

Chin, Stephen

Pulse or digital communications

Repeaters

Testing

375346, 370342, H04B 1500, H04B 110, H04B 7216

Patent

active

059533692

ABSTRACT:
A direct-sequence CDMA receiver comprises power detectors for receiving a spread spectrum signal for detecting the power levels of user channels. A channel ranking circuit determines the ranks of the power levels. A framing circuit segments the received spread spectrum signal into data blocks and appending, to each of the data blocks, a header containing channel numbers identifying the user channels arranged according to the determined power level ranks. A plurality of serial interference cancellation stages are provided, each including interference cancelers arranged in descending order of ranks. Each interference canceller detects one of the channel numbers of the header corresponding to the rank of the interference canceler, and removes one or more interfering signals from an associated user channel by using a despreading code that corresponds to the detected channel number.

REFERENCES:
patent: 5757791 (1998-05-01), Kanterakis et al.
J. Sawahashi, et al., "Serial Canceler Using Recursive Channel Estimation By Pilot Symbols for DS-CDMA", Institute of Electronics, Information and Communication Engineers (Japan), Technical Report, SAT 95-14, RCS95-50 (1995-07).
Sawahashi, M. et al., Electronics Letters, "Pilot Symbol-Assisted Coherent Multistage Interference Cancellar Using Recursive Channel Estimation for DS-CDMA Mobile Radio," vol. 32, No. 4, Feb. 15, 1996, pp. 301-302.

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