DS-0 loop-back detection on a DS-1 line

Details DS-0 loop-back detection on a DS-1 line DS-0 loop-back detection on a DS-1 line

1993-10-01

1995-03-14

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

3701101, H04J 314

Patent

active

053982347

ABSTRACT:
Loop-back detection and signalling is achieved on any DS-0 channel that conforms to 56 kbps operation such as DDS in a DS-1 digital data transmission system. A standard DS-1 chip set (line interface unit, framer, and link layer controller) is used, coupled to 24 transmit and receive buffer means in the customer main memory. The framer detects control bits by using Channel Associate Signalling, (designed for digitising voice in-band signalling and not normally used for data transmission), in the incoming signal and interrupts the customer CPU, which determines from the framer which channel caused the interrupt, changes the mode of the relevant channel, checks that channel's receive buffer means for loop-back codes, and, if enough successive loop-back codes are found, copies the receive buffer means into the transmit buffer means (with code mapping) for as long as the loop-back condition exists.

REFERENCES:
patent: 4958342 (1990-09-01), Williams et al.

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