Driving signal supply circuit

Details Driving signal supply circuit Driving signal supply circuit

2002-06-17

2003-03-25

Vu, Bao Q. (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S285000, C323S290000, C323S222000

Reexamination Certificate

active

06538418

ABSTRACT:

FIELD OF THE INVENTION
The present invention pertains to the switching power supply technical field. In particular, it pertains to a power supply suitable for portable computers.
BACKGROUND OF THE INVENTION
Element
510
in
FIG. 6
indicates an example of a switching regulator in the prior art.
This switching power supply
510
comprises a control circuit
520
, an output transistor
511
, an inductance element
513
, an output capacitor
514
and a flywheel diode
517
.
The output transistor
511
is comprised of an n-channel MOSFET, and the gate terminal is connected to the control circuit
520
and its operation is controlled by the control circuit
520
.
The drain terminal of the output transistor
511
is connected to a high voltage power supply V
P
, and the source terminal is connected to one end of the inductance element
513
. The other end of said inductance element
513
is connected to the output terminal
518
. Between the output terminal
518
and the ground potential, the output capacitor
514
is connected, and the load
515
is connected in parallel with this output capacitor
514
.
The anode terminal of the flywheel diode
517
is connected to the ground potential, and the cathode terminal is connected to the source terminal of the output transistor
511
.
When the output transistor
511
conducts, the source terminal is connected to the high voltage power supply V
P
. In this state, the flywheel diode
517
obtains inverse bias, and current is supplied from the high voltage power supply V
P
to the output capacitor
514
and the load
515
through the inductance element
513
.
When the output transistor
511
is cut off from that state, an electromotive force will be generated in the inductance element
513
; the source terminal of the output transistor
511
will be swung to a negative potential; the fly-wheel diode
517
will obtain forward bias; and current will be supplied to the load
515
by means of the energy accumulated in the inductance element
513
.
The aforementioned operation of the output transistor
511
is controlled by the control circuit
520
. To explain the internal configuration of the control circuit
520
, in said control circuit
520
, the first and the second potential dividing resistors
521
and
522
, a converter
525
, a reference voltage circuit
526
, a level shift circuit
533
, a buffer circuit
535
and an auxiliary power supply circuit
539
are provided.
The voltage of the output terminal
518
is divided by the first and the second potential dividing resistors
521
and
522
, and is input to the inverse input terminal of the comparator
525
. The reference voltage output by the reference voltage circuit
526
is input to the non-inverse input terminal of the comparator
525
, and the comparator
525
compares the divided voltage of the output terminal
518
and the reference voltage, and outputs the result of the comparison to the buffer circuit
535
through the level shift circuit
533
.
The buffer circuit
535
operates by means of the auxiliary power supply circuit
539
, and according to the result of the comparison, when the divided voltage of the output terminal
518
is smaller than the reference voltage, impresses a high voltage to the gate terminal of the output transistor
511
by means of the power supplied from the auxiliary power supply circuit
539
, and makes the output transistor
511
conduct. When the situation is the opposite, it impresses a voltage of the same potential as the source terminal to the gate terminal, and cuts off the output transistor
511
.
The aforementioned comparator
525
has a hysteresis characteristic, and controls such that when the output transistor
511
once conducts, the output transistor
511
will not be cut-off unless the divided voltage of the output terminal
518
decreases by the voltage of the hysteresis characteristic.
Because of the hysteresis characteristic, the load
515
is lighter, and when the output current is lowered, it is less likely that the voltage of the output terminal
518
will be lowered, thus, the oscillation frequency of the switching power supply
510
is lowered.
In general, when the switching power supply
510
is used for audio purposes of a computer, if the oscillation frequency of the switching power supply
510
exists in the voice band, there is a problem that the switching frequency will appear as noise in the speaker.
Therefore, with the aforementioned switching power supply
510
, the oscillation frequency will be lowered in case of a light load, and when the frequency reaches an upper limit frequency F
M
F
M
≈20 kHz or lower, noise will occur.
Element L
3
in the graph of
FIG. 5
indicates a curve that illustrates the relationship between the magnitude of the load and the oscillation frequency of switching power supply
510
. When the load
515
is lighter than the magnitude B, the oscillation frequency will be lower than the upper limit frequency F
M
of the voice band.
As a circuit whose oscillation frequency will be constant irrespective of the magnitude of the load, there is the switching power supply indicated with Element
610
in FIG.
7
.
This switching power supply
610
comprises first and second transistors
611
and
612
, the control circuit
620
, the inductance element
613
, and the output capacitor
614
.
First and the second output transistors
611
and
612
are comprised of n-channel MOSFETs. The drain terminal of the first output transistor
611
is connected to the high voltage power supply V
P
, and the source terminal of the second output transistor
612
is connected to the ground potential.
The source terminal of the first output transistor
611
and the drain terminal of the second output transistor
612
are connected to each other. If the part where these are connected to each other is the node indicated with Element
619
, one end of the inductance element
613
is connected to said node
619
.
The other end of the inductance element
613
is connected to the output terminal
618
, and between said output terminal
618
and the ground potential, the output capacitor
614
is connected.
The load
615
is connected in parallel with the output capacitor
614
.
To the gate terminals of the first and the second output transistors
611
and
612
, the control circuit
610
is connected, and the operation of the first and the second output transistors
611
and
612
is controlled by the control circuit
610
.
Omitting the explanation of the parts that are the same as those in the switching power supply
510
explained above, the internal configuration of the control circuit
620
of this switching power supply
610
will be explained.
This control circuit
620
comprises first and second control circuits
630
and
640
, which respectively control the operation of first and second output transistors
611
and
612
.
The voltage of the output terminal
618
is divided by first and second potential dividing resistors
621
and
622
; by means of the comparator
625
, the divided voltage and a reference voltage output by the reference voltage supply
626
are compared, and the result of the comparison is output from the comparator
625
.
If the divided voltage is higher than the reference voltage, a LOW signal will be output, and in the reverse case, a HIGH signal is output.
In first and second control circuits
630
and
640
, first and second delay circuits
632
and
642
are respectively provided; and to the first delay circuit
632
, the output signal of the comparator
625
is directly input, and to the second delay circuit
642
, the output signal of the comparator
625
is input after being reversed by the inverter
641
.
The output signal of the first delay circuit
632
is output to the first output transistor
611
through the level shift circuit
633
and the buffer circuit
635
; and the output signal of the second delay circuit
642
is output to the second output transistor
612
through the buffer circuit
645
.
First and second delay circuits
632
and
642
are configured so as to output af

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