Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-07-08
2002-01-08
Shalwala, Bipin (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S208000
Reexamination Certificate
active
06337673
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a plasma display device and a method for driving the same.
2. Description of the Related Art
A plasma display device has been implemented as one type of thin two-dimensional screen display device. A matrix-type surface discharge AC plasma display panel having a memory function is known as one of plasma display devices.
Almost of surface discharge AC plasma display panels employ a three-electrode structure. In this type of plasma display panel, two substrates, i.e., a front glass substrate and a back glass substrate are positioned opposite to each other with a predetermined gap intervening therebetween. On an inner surface (i.e., a surface opposite to the back glass substrate) of the front glass substrate serving as a display plane displaying an image, a plurality of paired row electrodes extending in parallel are formed as paired sustain electrodes. On the back glass substrate, a plurality of column electrodes intersecting with the paired row electrodes are formed to extend as address electrodes, and a fluorescent material is coated overlaying the column electrodes. Between the front substrate and the back substrate airtightly sealed, when viewed from the display plane, cells, i.e., unit light emitting regions each corresponding to a pixel or a light emitting cell are formed in a matrix form, each centered on the intersection of the paired row electrodes and a column electrode. In one cell, a gap between the row electrodes or the transparent electrodes near the intersection functions as a discharge gap. The row electrodes and the column electrodes may be referred to as “discharge electrodes.”
FIG. 1
illustrates the configuration of a driver for driving a plasma display panel
120
which comprises column electrodes D
1
to Dm connected to a pixel data pulse generator circuit
212
, and paired row electrodes X
1
, Y
1
to Xn, Yn connected to a row electrode driving pulse generator circuit
210
.
Referring specifically to
FIG. 1
, a synchronization separating circuit
201
extracts horizontal and vertical synchronization signals from an input video signal supplied thereto, and supplies a timing pulse generator circuit
202
with the extracted synchronization signals. The timing pulse generator circuit
202
generates an extracted synchronization signal timing pulse based on the extracted horizontal and vertical synchronization signals, and supplies this timing pulse to an A/D converter
203
, a memory control circuit
205
and a read timing signal generator circuit
207
, respectively. The A/D converter
203
converts the input video signal to digital pixel data corresponding to each pixel in synchronism with the extracted synchronization signal timing pulse, and supplies the digital pixel data to a frame memory
204
. The memory control circuit
205
supplies the frame memory
204
with a read signal and a write signal in synchronism with the extracted synchronization signal timing pulse. The frame memory
204
sequentially fetches respective pixel data supplied from the A/D converter
203
in response to the write signal. Pixel data stored in the frame memory
204
is sequentially read therefrom in response to the read signal and supplied to an output processing circuit
206
at the next stage. The read timing signal generator circuit
207
generates a variety of timing signals for controlling a discharge light emission operation, and supplies these timing signals to the row electrode driving pulse generator circuit
210
and to the output processing circuit
206
. The output processing circuit
206
supplies the pixel data pulse generator circuit
212
with pixel data supplied from the frame memory
204
in synchronism with a timing signal from the read timing signal generator circuit
207
.
The pixel data pulse generator circuit
212
generates a pixel data pulse DP corresponding to each of pixel data supplied from the output processing circuit
206
, and applies the pixel data pulse DP to the column electrodes D
1
-Dm of the plasma display panel
120
.
The row electrode driving pulse generator circuit
210
generates first and second predischarge pulses for performing a predischarge between all pairs of row electrodes X
1
, Y
1
to Xn, Yn in the plasma display panel
120
, a priming pulse for re-forming charged particles, a scan pulse for writing pixel data, a sustain pulse for sustaining a discharge for emitting light in accordance with pixel data, and an erasure pulse for stopping the discharge sustained for light emission. The row electrode driving pulse generator circuit
210
supplies to the row electrodes X
1
-Xn and Y
1
-Yn of the plasma display panel
120
with these pulses at timings corresponding to a various types of timing signals supplied from read timing signal generator circuit
207
.
The row electrode driving pulse generator circuit
210
includes an X-driver for generating a sustain pulse for the row electrodes X
1
to Xn, and a Y-driver for generating a sustain pulse for the row electrodes Y
1
to Yn.
For driving a surface discharge AC plasma display panel having a plurality of pixel cells formed in matrix, it is necessary to select whether or not each pixel cell is to emit light in each sub-frame. In this event, for providing a uniform difference in light emitting condition between pixel cells due to the difference in data for images to be displayed in each sub-frame, and also for stabilizing a discharge when writing data, a rectangular reset pulse is applied between row electrodes of the paired row electrodes to initialize all cells by the action of a reset discharge caused by the application of reset pulse. Next, a rectangular scan pulse is applied to the column electrodes selected in accordance with data to cause selective discharges between the selected column electrodes and associated row electrodes to write data into corresponding pixel cells.
In the initialization of and the data write into pixel cells, there are two possible processes. First, selective writing is performed for selecting pixel cells, from which light is to be emitted, by previously generating a constant amount of wall charges in all pixel cells by the reset discharge and increasing the wall charges in the pixel cells by a so-called selective discharge using a scan pulse applied to selected column electrodes. Second, a selective erasure is performed for selecting pixel cells to be maintained unlit by extinguishing wall charges in the pixel cells by a selective discharge. Subsequently, a sustain pulse is applied to produce a sustaining discharge for maintaining emitted light in selected pixel cells during the selective write or to produce a sustaining discharge for maintaining emitted light in non-selected pixel cells during the selective erasure. Further, after a predetermined time has elapsed, data written in pixel cells is erased by applying erasure pulses to the pixel cells in any data write.
FIG. 2
conceptually illustrates the configuration of an X-driver
210
X and a Y-driver
210
Y in a row electrode driving pulse generator circuit
210
. Referring specifically to
FIG. 2
, the pulse generator circuit
210
comprises a sustain voltage source Vs; switches SW
1
-SW
5
such as FETs; a charge recovering capacitor CK; coils LK
1
, LK
2
; and diodes D
1
, D
2
each for regulating a current to flow in a single direction. In this configuration, a series resonance circuit is formed of the capacitor CK and the coil LK
1
or LK
2
.
A driving method for generating a sustain pulse to row electrodes X
1
-Xn by the X-driver
210
X will now be described with reference also to
FIGS. 3A and 3B
.
FIG. 3A
illustrates the charging voltage waveform of a sustain pulse applied to a row electrode, and
FIG. 3B
illustrates a change in the luminance of emitted light from an associated cell. Assume that a charge has been sufficiently recovered to the capacitor CK from a panel after the switch SW
2
has been turned ON and the remaining switches have been turned OFF after application of the preceding sustain pulse
Ajiki Hiroyuki
Ide Shigeo
Patel Nitin
Pioneer Corporation
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