Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
2000-03-08
2004-01-06
Moe, Aung S. (Department: 2612)
Television
Camera, system and detail
Solid-state image sensor
C348S312000
Reexamination Certificate
active
06674469
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a driving method for a solid-state image pickup device of the frame transfer system.
2. Description of the Prior Art
FIG. 1
is a top plan view schematically showing a CCD solid-state image pickup device of the frame transfer system, and
FIG. 2
is a timing chart illustrating the operation of the solid-state image pickup device.
The solid-state image pickup device of the frame transfer system comprises a light receiving section
1
, a storage section
2
, a horizontal transfer section
3
, and an output section
4
. The light receiving section
1
comprises a plurality of shift registers, having a plurality of consecutive bits in the vertical direction, arranged so as to be parallel to each other. Each bit of these shift registers forms a light receiving bit. Each light receiving bit generates and accumulates information charges corresponding to an object image. The storage section
2
is formed from a plurality of shift registers consecutive to each shift register of the light receiving section
1
. Each bit of these shift registers forms a storage bit, and each storage bit temporarily stores the information charge transferred from the light receiving section
1
. The horizontal transfer section
3
comprises a single shift register, to which each bit is connected the respective output of the plurality of shift registers of the storage section
2
, and receives, then sequentially transfers and outputs in the horizontal direction, one line at a time the information charges of one screen stored in the storage section
2
. The output section
4
is formed from an electrically independent capacitor and an amplifier obtaining the change in electric potential of the capacitor, and the information charge that is output from the horizontal transfer section
3
is received at the capacitor one bit at a time and converted to a voltage value and output as image signal Y
0
.
To the light receiving section
1
is applied a frame transfer clock &phgr;F for transferring at high speed the information charge of the light receiving section
1
to the storage section
2
within the blanking period of a vertical scan in synchronization with a vertical synchronization signal VD. To the storage section
2
is applied a vertical transfer clock &phgr;V for loading the information charges that are transferred and output from the light receiving section
1
by the frame transfer clock &phgr;F as well as for transferring the loaded information charges for one screen to the horizontal transfer section
3
one line at a time within the blanking period of a horizontal scan in synchronization with a horizontal synchronization signal HD. Then, to the horizontal transfer section
3
is applied a horizontal transfer clock &phgr;H for transferring the information charges that are loaded into the horizontal transfer section
3
one line at a time in response to the vertical transfer clock &phgr;V to the sequential output section
4
in synchronization with the horizontal synchronization signal HD. As a result, the information charges generated at the light receiving section
1
, after being transferred to the storage section
2
in one-screen units, are transferred and output one line at time to the output section
4
via the horizontal transfer section
3
, and the image signal Y
0
is output in consecutive one line units.
Furthermore, a substrate clock &phgr;B, which rises for a predetermined period during the vertical scan period, is applied to the semiconductor substrate that forms the solid-state image pickup device. In response to the rise of the substrate clock &phgr;B, the frame transfer clock &phgr;F is clocked at the same period as during frame transfer, and the information charges of the light receiving section
1
are completely discharged to the substrate. Therefore, a period L, from the completion of the discharge operation of information charges by the substrate clock &phgr;B to the initiation of the transfer operation by the frame transfer clock &phgr;F, becomes the storage time of the information charges. The image signal Y
0
represents a level that is proportional to the quantity of information charges accumulated in each light receiving pixel of the light receiving section
1
during the storage time L.
In the case of the solid-state image pickup device of the frame transfer system, the storage performance of the information charge of each light receiving pixel is attributed to the capacity of the potential well formed within the substrate by effect of the transfer electrode located in the light receiving section
1
. The capacity of this potential well is determined, for example, by the width of the transfer electrode and width of the transfer channel, and further the voltage of the pulse driving the transfer electrode.
When the width of the transfer electrode or width of the transfer channel narrows with the increased resolution of the solid-state image pickup device, the capacity of the potential well that is formed decreases and the storage performance of the information charge of each light receiving pixel lowers. Furthermore, when the driving pulse is lowered in voltage in order to reduce the power consumption of the device, the capacity of the potential well that is formed decreases further. Therefore, the dynamic range of the solid-state image pickup device becomes narrow and the image pickup conditions become restricted.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a driving method that is capable of extending the dynamic range of the solid-state image pickup device.
The driving method for the solid-state image pickup device, having transfer electrodes corresponding to at least six phases of transfer clocks and storing information charges in potential wells formed by effect of these transfer electrodes, is characterized by forming a potential well at two locations with at least two transfer electrodes therebetween among transfer electrodes corresponding to transfer clocks of at least six phases, as well as setting the storage time for one potential well to be shorter than the storage time for the other potential well and transferring and outputting the potential well at the two locations independently of each other.
According to the present invention, even if one potential well overflows, the storage of information charges can be performed without overflow at the other potential well because of independently reading out the two potential wells with different storage times of information charges. Then, by adding the outputs from both potential wells, the quantity of incident light to the light receiving pixels can be represented over a wide range.
REFERENCES:
patent: 4774585 (1988-09-01), Suga et al.
patent: 5757427 (1998-05-01), Miyaguchi
patent: 6040859 (2000-03-01), Takahashi
patent: 6452634 (2002-09-01), Ishigami et al.
Hogan & Hartson LLP
Moe Aung S.
Sanyo Electric Co,. Ltd.
LandOfFree
Driving method for solid-state image pickup device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Driving method for solid-state image pickup device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Driving method for solid-state image pickup device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3250215