Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2001-03-09
2004-01-20
Shalwala, Bipin (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S062000, C345S063000, C345S066000, C345S067000, C345S072000
Reexamination Certificate
active
06680716
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a driving method for plasma display panels used for a flat screen type television, an information display and the like, in particular, to a driving method which can reduce false contours in dynamic images in a sub-field method.
2. Description of the Related Art
Plasma display panels (“PDP”) have many advantages such that they have thinner structures, provide less flickers and larger display contrasts, can be easily built into large screen sizes, have faster response speeds, and are capable of multicolor luminance by using phosphors as they are emissive type. Consequently, they are becoming quite popular as computer-related displays and other color image displays.
The PDP can be divided based on their operating principles into an AC type one, which operates under an alternating current discharge state indirectly with the electrodes covered with dielectric materials, and a DC type one, which operates under a direct current discharge state with the electrodes being exposed to a discharge space. Moreover, the AC type PDP can be divided depending on the driving method into a memory operating type, which uses a memory function of each discharge cell, and a refresh operating type, which doesn't use the function. The intensity of a PDP is proportional to the number of discharges. Since the intensity of the refresh type reduces as the display capacity increases, it is primarily used as a small display capacity PDP.
FIG. 1
is a perspective drawing showing the structure of display cells of a typical AC type PDP, and
FIG. 2
is a cross-sectional drawing of the same.
A display cell
16
has two insulating substrates
1
and
2
made of glass. The insulating substrate
1
is a back substrate and the insulating
2
is a front substrate.
One side of the insulating substrate
2
that is facing the insulating substrate
1
is provided with transparent scanning electrodes
3
and transparent sustaining electrodes
4
. The scanning electrodes
3
and the sustaining electrodes
4
extend in the horizontal direction (transverse direction) of the panel. Bus electrodes
5
and
6
are arranged so as to overlay upon the scanning electrodes
3
and the sustaining electrodes
4
, respectively. The bus electrodes
5
and
6
can be made of a metal and are provided there to minimize the electrical resistance value between each electrode and the external drive unit. A dielectric material layer
12
is provided to cover the scanning electrodes
3
and the sustaining electrodes
4
. Also provided is a protective layer
13
made of magnesium oxide or the like for the purpose of protecting the dielectric layer
12
from discharges.
A data electrode
7
is provided in a direction perpendicular to those of the scanning electrodes
3
and the sustaining electrodes
4
on one side of the insulating substrate
1
that faces the insulating substrate
2
. Thus, the data electrode
7
extends in the perpendicular direction (vertical direction) of the panel. Partition walls
9
are separating the display cells in the horizontal direction. A dielectric layer
14
is provided to cover the data electrodes
7
. A phosphor layer
11
is formed in such a way as to cover the side surfaces of the partition walls
9
and the surface of the dielectric layer
14
in order to convert an ultraviolet light generated by a discharge of discharge gas into visible light
10
. A discharge gas space
8
is secured with the partition walls
9
between the insulating substrates
1
and
2
, and discharge gas containing helium, neon, xenon or the like, or a mixture of these gases fills the discharge gas space
8
.
The discharge operation will be described that occurs in a display cell
16
selected on a conventional PDP constituted as described above.
When discharge starts as the pulse voltage higher than the discharge threshold value is applied between the scanning electrode
3
and the data electrodes
7
, positive and negative charges will be attracted to the surfaces of the dielectric layers
12
and
14
and electric charges will accumulate in response to polarity of the pulse voltage. An equivalent internal voltage caused by the accumulation of charges, i.e., the wall voltage, has a polarity opposite to that of the pulse voltage. Thus, with the progress of the discharge, the effective voltage inside the cell drops, and will become impossible to sustain the discharge even if the pulse voltage is maintained at a constant value, and eventually the discharge will stop.
However, when a sustaining discharge pulse, which has the same polarity as the wall voltage, is applied between adjacent scanning electrodes
3
and sustaining electrodes
4
, the wall voltage will be added to them as the effective voltage. Therefore, even if the voltage amplitude of the sustaining discharge pulse is respectively low, the effective voltage will exceed the discharge threshold value, and discharge will occur. Consequently, by applying a sustaining discharge pulse between the scanning electrodes
3
and the sustaining electrodes
4
reciprocally, the discharge becomes sustainable. This is the abovementioned memory function.
Moreover, by applying to the scanning electrodes
3
or the sustaining electrodes
4
an erasure pulse such as a wide and low voltage pulse that neutralizes the wall voltage, or a narrow width pulse with a voltage comparable to the sustaining discharge pulse voltage, the sustaining discharge can be stopped.
FIG. 3
is a block diagram showing the outline of a PDP formed by arranging display cells such as the one shown in
FIG. 2
in a matrix as well as control circuits and drivers for the PDP.
A PDP
15
is a dot matrix display panel where display cells
16
typically shown in
FIG. 2
in a matrix of m-rows and n-columns. Scanning electrodes X
1
, X
2
, . . . , Xm and sustaining electrodes Y
1
, Y
2
, . . . Ym are arranged parallel to each other as row electrodes, and data electrodes D
1
, D
2
, . . . , Dn are arranged perpendicular to the scanning electrodes and the sustaining electrodes as column electrodes.
A control circuit
31
is equipped with a frame memory
32
that stores image data for sub-fields that constitute a frame. It is also equipped with a signal processing memory control circuit
33
that receives vertical synchronous signal Vsync, horizontal synchronous signal Hsync, clock signal Clock and data DATA to read the data for sub-fields in the frame memory
32
based on those signals. The vertical synchronous signal Vsync is a signal to instruct the cycle for one frame and the starting point on the display screen for the cycle. For example, in case of constituting a frame asynchronous with the clock signal Clock, the vertical synchronous signal Vsync is to designate the leading display data DATA for the entire screen. The horizontal synchronous signal Hsync is a signal that instructs capture of display data for each horizontal scanning line. The horizontal synchronous signal Hsync corresponds to a signal that instructs the start of scanning for each horizontal scan in a cathode ray tube (CRT) display. A driver control circuit
34
is also provided for controlling the operation of the PDP
15
in relation to the output signal of the signal processing memory control circuit
33
.
Further provided here a scan driver
21
that generates a scanning electrode drive pulse based on control signals received from the control circuit
31
and applies it to the scanning electrodes X
1
, X
2
, . . . , Xm, a sustain driver
22
that generates a sustaining electrode drive pulse based on control signals received from the control circuit
31
and applies it to the sustaining electrodes Y
1
, Y
2
, . . . Ym, and an address driver
20
that generates a data electrode drive pulse based on control signals received from the control circuit
31
and applies it to the data electrodes D
1
, D
2
, . . . , Dn.
Next, the prior driving method for the PDP shown in
FIG. 3
will be described.
FIG. 4
is a conceptual drawing showing one frame in the prior driving method, an
Hayes & Soloway P.C.
Leonid Shapiro
NEC Corporation
Shalwala Bipin
LandOfFree
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