Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1998-09-22
2003-01-28
Hjerpe, Richard (Department: 2774)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C349S094000
Reexamination Certificate
active
06512506
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a driving device for driving a liquid crystal display element employed in a liquid crystal display of a matrix electrode structure using a multiplex (time division) driving method, and more particularly, to a driving device for driving a liquid crystal display element by dividing a 1-line selection period into more than one segment.
BACKGROUND OF THE INVENTION
Recently, liquid crystal displays are used in diversified fields including AV (Audio Visual) and OA (Office Automation) systems. Low-end products employ passive type liquid crystal displays, whereas high-end products employ liquid crystal displays driven by the active matrix driving method using switching elements, such as 3-terminal elements represented by TFTs (Thin Film Transistors) and 2-terminal elements represented by MIM (Metal-Insulator-Metal) elements.
Here, a conventional liquid crystal display will be explained with reference to
FIG. 7. A
display panel
102
of a conventional liquid crystal display
101
includes data electrode lines X
1
-Xn and scanning electrode lines Y
1
-Ym that intersect with the data electrode lines X
1
-Xn. Serially connected picture elements
103
are provided individually to portions enclosed by the data electrode lines X
1
-Xn and scanning electrode lines Y
1
-Ym. The picture elements
103
may include switching elements composed of the 2-terminal or 3-terminal elements.
A control section
104
of the liquid crystal display
101
receives an external interface signal IN from an unillustrated external circuit. For example, as shown in
FIG. 8
, the external interface signal IN includes a data signal DATA which conveys the display state of each picture element
103
in sync with a reference clock CLK, and a data enable signal ENAB which indicates whether the data signal DATA should be displayed or not. The external interface signal IN also includes a horizontal direction synchronizing signal LP supplied for every data signal DATA for each of the scanning electrode lines Y
1
-Ym, and a vertical direction synchronizing signal FP supplied for each screen (frame).
It is generally difficult to specify how many times the reference clock CLK is inputted in one cycle of the horizontal direction; synchronizing signal LP. This is because, in case of a display control circuit designed using, as a memory IC for storing the data signal DATA, a memory generally known as a DRAM which requires a refresh pulse, the frequency of the reference clock CLK varies with the specification of an external circuit (not shown) which generates an external interface signal.
The control section
104
generates a control signal which indicates a driving voltage and a driving timing of each of the data electrode lines X
1
-Xn and scanning electrode lines Y
1
-Ym in accordance with the external interface signal IN, and sends the same to a scanning electrode driving circuit
105
and a data electrode driving circuit
106
. The scanning electrode driving circuit
105
selects the scanning electrode lines Y
1
-Ym successively in accordance with the control signal and applies a predetermined voltage to each. On the other hand, the data electrode driving circuit
106
applies a predetermined voltage to each of the data electrode lines X
1
-Xn in response to display data of the picture elements
103
.
Here, a brief explanation of a voltage applied to one particular picture element
103
connected to a data electrode line Xi and a scanning electrode line Yj will be given with reference to FIGS.
9
(
a
) through
9
(
e
).
As shown in
FIG. 9
(
a
), the horizontal direction synchronizing signal LP is applied to all the picture elements
103
for each of the scanning electrode lines Y
1
-Ym. Of the entire horizontal direction synchronizing signal LP, a period corresponding to the scanning electrode line Yj is a selection period for the subject picture element
103
. An A/C signal M shown in FIG.
9
(
b
) is generated based on the horizontal direction synchronizing signal LP of FIG.
9
(
a
). The A/C signal M is a signal inverting periodically, for example, for every scanning electrode line.
During a non-selection period, that is, while the subject picture element
103
is not selected, the scanning electrode driving circuit
105
applies a voltage V
1
or V
4
to the scanning electrode line Yj as shown in FIG.
9
(
c
) in accordance with the A/C signal M of FIG.
9
(
b
). On the other hand, the data electrode driving circuit
106
selects a voltage to be applied to the data electrode line Xi depending on whether the subject picture element
103
connected to the currently selected scanning electrode line Yj and data electrode line Xi stays ON or OFF.
For example, as shown in FIG.
9
(
d
), while the A/C signal M is in the high level, a voltage V
0
indicated by a solid line is selected if the subject picture element
103
stays ON, and a voltage V
2
indicated by a dotted line is selected if the subject picture element
103
stays OFF. On the other hand, while the A/C signal M is in the low level, a voltage V
5
indicated by the solid line is selected if the subject picture element
103
stays ON, and a voltage V
3
indicted by a dotted line is selected if the subject picture element
103
stays OFF. Consequently, as shown in FIG.
9
(
e
), the voltage applied to the subject picture element
103
connected to the scanning electrode line Yj and data electrode line Xi varies within a range from a grounding level GND to a voltage Vb.
On the other hand, during the selection period, either a voltage V
5
or V
1
is applied to the scanning electrode line Yj in, response to the A/C signal M as shown in FIG.
9
(
c
). Thus, in case that the data signal DATA conveys an ON command, as indicated by a solid line in FIG.
9
(
e
), a voltage V
0
is applied to the subject picture element
103
while the A/C signal M is in the low level, and a voltage −V
0
is applied to the subject picture element
103
while the A/C signal M is in the high level, whereupon the subject picture element
103
comes ON. Likewise, in case that the data signal DATA conveys an OFF command, as indicated by dotted lines in FIG.
9
(
e
), a voltage V
2
is applied to the subject picture element
103
while the A/C signal M is in the low level, and a voltage −V
2
is applied to the subject picture element
103
while the A/C signal M is in the high level, whereupon the subject picture element
103
goes OFF. Consequently, both the driving circuits
105
and
106
can drive the picture elements
103
individually by the voltage averaging method.
Incidentally, the characteristics of the liquid crystal display vary with a change of environmental conditions, such as temperatures, irregular characteristics of the display panel per se as an electronic component, etc.
For instance, it is known that a display quality, particularly, the contrast, of a liquid crystal display using the 2-terminal elements depends largely on ambient temperature.
FIG. 10
shows V-CR (voltage-vs.-contrast) characteristics of the liquid crystal display using the 2-terminal elements. In the drawing, a curve (a) represents the characteristics at normal temperature, a curve (b) represents those at high temperatures, and a curve (c) represents those at low temperatures.
FIG. 10
reveals that, when the temperature is low, a maximum contrast value and a liquid crystal applying voltage (hereinafter, referred to as maximum contrast voltage) necessary to obtain the maximum contrast value are larger compared with those at normal temperature.
FIG. 10
also reveals that, when the temperature is high, both the maximum contrast value and maximum contrast voltage are smaller compared with those at normal temperature.
Therefore, when the temperature is high, the maximum contrast value becomes too small, whereas when the temperature is low, the maximum contrast voltage becomes so large that it exceeds a specification value of a withstand voltage for a liquid crystal, driver IC. Hence, there arises a problem that the voltage alone can not adjust
Birch & Stewart Kolasch & Birch, LLP
Hjerpe Richard
Nguyen Kevin M.
Sharp Kabushiki Kaisha
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