Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1999-03-24
2003-04-15
Nguyen, Chanh (Department: 2675)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S098000
Reexamination Certificate
active
06549184
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a driving circuit of an active matrix type semiconductor display device. The present invention also relates to the semiconductor display device having the driving circuit.
2. Description of the Related Art
In recent years, a technique for manufacturing a semiconductor device having a semiconductor thin film formed on an inexpensive glass substrate, such as a thin film transistor (TFT), has been rapidly developed. The reason is that the demand for an active matrix type semiconductor display device (especially an active matrix type liquid crystal display device) has been increased.
In the active matrix type liquid crystal display device, a TFT is disposed for each of several tens to millions of pixels arranged in matrix, and an electrical charge going in and out each pixel electrode is controlled by a switching function of the TFT.
Especially, with the improvement of a display device in resolution and picture quality, attention comes to be paid to an active matrix type liquid crystal display device having a digital driving circuit which can process digital video data as it is.
In a source signal line side driving circuit of a semiconductor display device including a digital driving circuit, digital video data supplied from the outside are sequentially held by a latch circuit or the like for a short time on the basis of a timing signal from a shift register. And after the data are converted into an analog signal (gradation voltage), the signal is supplied to a corresponding pixel TFT. When the digital driving circuit is used, it becomes possible to realize a so-called line-sequential driving in which pixel TFTs for one line are driven at the same time.
In the digital driving circuit, on the basis of the timing signal from the shift register, operation timing of the latch circuit, D/A conversion circuit, and the like is determined. A number of circuits and elements each having a large load capacity are connected to a signal line to which the timing signal is supplied from the shift register. Thus, there is a case that the timing signal from the shift register produces “dulling” on the way. As one of countermeasures to this, a trial has been made in which the timing signal from the shift register is made to pass through a buffer circuit or the like to eliminate “dulling”.
If current capacity of a buffer circuit is small, the buffer function is meaningless. So, a buffer having a large current capacity to a certain degree is required. In the case where a buffer having a large current capacity is formed using thin film transistors, a TFT having a large current capacity, that is, a large channel width is required. However, in a TFT having a large channel width, fluctuation in crystallinity occurs in a component, and as a result, fluctuation in threshold voltage occurs for each TFT. Thus, it is inevitable that fluctuation occurs also in the characteristics of a buffer constituted by a plurality of TFTs. Thus, there exist buffers having fluctuation in the characteristics for each signal line, and the fluctuation in the characteristics directly causes fluctuation in applied voltage to a pixel matrix circuit. This causes display blur (display unevenness) of the display device as a whole.
Moreover, if the size (channel width) of a TFT is too large, only the center portion of the TFT functions as a channel, and its ends do not function as the channel. In this case, deterioration of the TFT is accelerated.
Further, when the size of a TFT is large, self heat generation of the TFT becomes large, which sometimes causes change of a threshold value or deterioration.
In a gate signal line side driving circuit as well, a scanning signal is sequentially supplied to a gate signal line (scanning line) on the basis of a timing signal from a shift register. In a digital driving circuit carrying out line-sequential driving, all pixel TFTs for one line connected to one scanning line must be driven, and a load capacity connected to one scanning line is large. Thus, also in the gate signal line side driving circuit, it is necessary to eliminate “dulling” by making the timing signal from the shift register pass through a buffer circuit or the like. Also in this case, since a buffer having a large current capacity becomes necessary, the above described problems come to occur. Especially, the buffer of the gate signal line must drive all of the connected TFTs for one line in the pixel matrix circuit, so that the fluctuation in the characteristics of the buffer makes remarkable picture unevenness. This is one of the most serious problems when a display device with high fineness/high resolution is desired.
SUMMARY OF THE INVENTION
The present invention has been made to overcome the foregoing problems, and an object thereof is to provide a semiconductor display device which can eliminate picture blur (display unevenness) and can obtain an excellent picture with high fineness/high resolution.
According to a mode of carrying out the present invention, in a driving circuit of a semiconductor display device, as a TFT constituting a buffer circuit provided between a shift register circuit and a latch circuit of a source signal line side driving circuit, a TFT having a large size (channel width) is not used, but instead thereof, a plurality of TFTs each having a small size and are connected in parallel with each other are used. Moreover, as a TFT constituting a buffer circuit provided between a shift register circuit and a gate signal line of a gate signal line side driving circuit, a TFT having a large size (channel width) is not used, but instead thereof, a plurality of TFTs each having a small size and are connected in parallel with each other are used. In both cases, a plurality of buffer circuits are connected in parallel with each other to constitute a buffer circuit portion in a driver circuit. By doing so, it is possible to reduce fluctuation in characteristics of the buffer circuit while securing the current capacity thereof.
The structure of the present invention will be described hereinafter.
According to one aspect of the present invention, there is provided a driving circuit of a semiconductor display device, comprising: a source signal line side driving circuit; and a gate signal line side driving circuit, wherein the gate signal line side driving circuit includes a buffer circuit which buffers a timing signal from a shift register circuit and includes a plurality of inverter circuits, and each of the inverter circuits is constituted by a plurality of inverters connected in parallel with each other. By this, the above object can be achieved.
According to another aspect of the present invention, there is provided a driving circuit of a semiconductor display device, comprising: a source signal line side driving circuit; and a gate signal line side driving circuit, wherein the source signal line side driving circuit includes a buffer circuit which buffers a timing signal from a shift register circuit and includes a plurality of inverter circuits, and each of the inverter circuits is constituted by a plurality of inverters connected in parallel with each other. By this, the above object can be achieved.
According to still another aspect of the present invention, there is provided a driving circuit of a semiconductor display device, comprising: a source signal line side driving circuit; and a gate signal line side driving circuit, wherein the source signal line side driving circuit includes a buffer circuit which buffers a timing signal from a shift register circuit and includes a plurality of inverter circuits, and each of the inverter circuits is constituted by a plurality of inverters connected in parallel with each other, and wherein the gate signal line side driving circuit includes a buffer circuit which buffers a timing signal from a shift register circuit and includes a plurality of inverter circuits, and each of the inverter circuits is constituted by a plurality of inverters connected in parallel with each other. B
Koyama Jun
Yamazaki Shunpei
Kumar Srilakshmi
Nguyen Chanh
Robinson Eric J.
Robinson Intellectual Property Law Office P.C.
Semiconductor Energy Laboratory Co,. Ltd.
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