Driving circuit including shift register and flat panel...

Details Driving circuit including shift register and flat panel... Driving circuit including shift register and flat panel...

2004-12-27

2008-11-04

Mengistu, Amare (Department: 2629)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S092000

Reexamination Certificate

active

07446748

ABSTRACT:
A driving circuit for a flat panel display device includes first and second generation units generating m-phase circulation enable control clocks and n-phase circulation form generation clocks; and a plurality of shift register stages generating output signals by using the m-phase circulation enable control clocks and the n-phase circulation form generation clocks. Each shift register stage includes an input terminal receiving the m-phase circulation enable control clocks; first and second nodes outputting first and second signals, respectively, using the m-phase circulation enable control clocks; a first transistor connected to the first node and receiving the n-phase circulation form generation clocks; a second transistor connected to the second node and the first transistor; and an output terminal between the first and second transistors and outputting one of the output signals.

REFERENCES:
patent: 6049321 (2000-04-01), Sasaki
patent: 6426743 (2002-07-01), Yeo et al.
patent: 2003/0128180 (2003-07-01), Kim et al.
patent: 1020020066962 (2002-08-01), None

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