Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2000-06-08
2002-07-23
Chow, Dennis-Doon (Department: 2775)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C341S144000, C341S150000
Reexamination Certificate
active
06424331
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a driving circuit for an electro-optical device, a driving method therefor, a DA converter, a signal line driving circuit, an electro-optical panel, a projection display device, and electronic equipment.
DESCRIPTION OF RELATED ART
Generally, an image display portion of a liquid crystal display device is constituted by a device substrate, an opposing substrate, and a liquid crystal which fills the gap between these substrates. A plurality of scanning lines, a plurality of signal lines, and a plurality of transistors and a plurality of pixel electrodes provided correspondingly to intersections between the scanning lines and the signal lines, are formed on the device substrate. On the other hand, common electrodes are formed on the opposing substrate. Further, the plurality of transistors used therein are thin film transistors (hereunder referred to as TFTs).
Each of the TFTs has a gate, a source, and a drain, which are respectively connected to one of the scanning lines, one of the signal lines, and one of the pixel electrodes.
Usually, a method for driving this image display portion may consist of the steps of simultaneously turning on a plurality of TFTs connected to scanning lines by selecting the scanning lines with a predetermined timing, and then simultaneously applying voltages of signal lines to pixel electrodes. In this case, voltages corresponding to image data are supplied to the signal lines. The transmittance of a liquid crystal is controlled according to a voltage applied to between the pixel electrodes and common electrodes. This enables the display device to perform gray scale display according to values represented by image data.
Meanwhile, the relation between the voltage applied to a liquid crystal and the transmittance of the liquid crystal is not linear but non-linear. Thus, there is the necessity for performing a process of making an amount of a change in the transmittance of the liquid crystal caused corresponding to each gray scale level of the image data, uniform. In the present application, this process is referred to as a &ggr; correction.
FIG. 28
is a block diagram illustrating a signal line driving circuit for driving one of the signal lines, and also illustrating peripheral circuits thereof. In this figure, the signal line driving circuit consists of a first latch circuit
921
, a second latch circuit
922
, and a DA converter
93
. Further, a controller
6
and a &ggr; correction circuit
91
are provided at the preceding stage of this signal line driving circuit.
The controller
6
generates 6-bit image data DA. The &ggr; correction circuit
91
performs a &ggr; correction on the image data DA to thereby produce 8-bit image data DB (D&ggr;
1
, D&ggr;
2
, . . . , D&ggr;
8
). Incidentally, the &ggr; correction circuit
91
is constituted by a RAM or a ROM, in which a table for performing a &ggr; correction is stored. Data stored in this table is determined according to the input/output characteristics of the DA converter
93
and the transmittance-applied-voltage characteristics of the liquid crystal.
The DA converter
93
is a capacitance-divided type DA converter, which has switch and capacitive elements. The DA converter
93
has
8
capacitive devices
941
to
948
. Let C denote the capacitive value of the capacitive device
941
. The capacitive values of the capacitive devices
942
,
943
, . . . ,
948
are selected as
2
C,
4
C, . . . ,
128
C, respectively.
Further, a signal line
99
has a signal line parasitic capacitor or capacitance
940
. In
FIG. 28
, the value of the parasitic capacitance is designated by reference character Cs. The voltage Vcom at the other terminal of the signal line capacitor
940
is applied to a common electrode placed in the opposing substrate.
Two reference voltages Va and Vb are supplied to the DA converter
93
. One of terminals of each of the capacitive devices
941
to
948
is connected to a supply terminal Ta through which the reference voltage Va is supplied. On the other hand, the other terminal of each of the capacitive devices
941
to
948
is connected to the supply terminal Ta through a corresponding one of the reset switches
951
to
958
. When each of the switches
951
to
958
is turned on, both terminals of each of the capacitive devices
941
to
948
is short-circuited. Thus, charges charged in each of these capacitive devices are discharged. Further, a reset switch
910
is connected to a point between a supply terminal Tb, through which the reference voltage Vb is supplied, and the signal line
99
. When this switch
910
is turned on, the electric potential of the signal line
99
is reset to the voltage Vb.
Additionally, switches
961
to
968
adapted to be turned on or off according to the values indicated by the image data D&ggr;
1
to D&ggr;
8
are provided between the signal line
99
and each of the capacitive devices
941
to
948
. When the switches
961
to
968
are selectively turned on, the capacitive devices connected to the turned-on switches are connected in parallel with one another. Consequently, a voltage corresponding to the image data DB is applied to the signal line
99
.
FIG.
29
(A) is a graph illustrating the relation between the decimal value of the image data DA and the output voltage Vc of a DA converter
93
. FIG.
29
(B) is a graph illustrating the relation between the transmittance SLP of a liquid crystal and the voltage VLP to be applied to a pixel electrode through the signal line.
A brief description is given of the operating principle of the driving circuit with reference to FIGS.
29
(A) and
29
(B). First, when the 6-bit image data DA is inputted from the controller
6
to the &ggr; correction circuit
91
, this correction circuit
91
converts the image data DA to the 8-bit image data DB. Incidentally, the aforementioned table is created as follows. First, 64 pieces of the 8-bit data, from which gray scale levels are set according to the transmittance characteristic of the liquid crystal pixel in such a manner as to respectively correspond to equal intervals of a predetermined change in the transmittance of the liquid crystal, are preliminarily selected from 256 pieces of the 8-bit data. Then, the selected 64 pieces of the 8-bit data are stored in the table as the image data DB by being made to correspond to the 6-bit image data DA, respectively.
Thus, when the 6-bit image data DA is inputted to the &ggr; correction circuit
91
, this &ggr; correction circuit
91
reads data from the table, which corresponds to the value represented by the inputted image data DA and outputs the read data as the image data DB. That is, the image data DB is represented by using 8 bits so that amounts of a change in the transmittance of the liquid crystal &Dgr;SLP, which respectively correspond to the differences between the adjoining gray scale levels of the image data DA, are equal to one another.
Meanwhile, the driving circuit illustrated in
FIG. 28
performs the &ggr; correction, as described above. Thus, the &ggr; correction circuit
91
becomes necessary. Furthermore, there is a tendency to increase the size of the liquid crystal panel. The length of the signal line
99
increases with increase in the size of the panel. Thus, when the liquid crystal panel increases in size, the value of the parasitic capacitance Cs tends to increase. On the other hand, the DA converter
93
applies a desired voltage to the signal line
99
by transferring charges between the parasitic capacitor
940
and a group of the capacitive devices
941
to
948
. Therefore, when the value of the parasitic capacitance Cs increases, it is necessary to increase the capacitive value of each of the capacitive devices
941
to
948
. Generally, the capacitive devices take up a large area in the integrated circuit. Consequently, this hinders the miniaturization of the driving circuit.
Further, there has been devised an alternative measure to raise the voltage to be supplied to the capacitive devices
941
to
948
of the DA converter
93
,
Chow Dennis-Doon
Oliff & Berridg,e PLC
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