Driving circuit for a field emission display

Details Driving circuit for a field emission display Driving circuit for a field emission display

2000-05-11

2003-05-27

Shalwala, Bipin (Department: 2673)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S074100, C315S169300

Reexamination Certificate

active

06570547

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a field emission display, and more particularly to a driving circuit for a field emission display for driving gate, cathode and anode lines in the field emission display.
BACKGROUND ART
Field emission display (FED), which has been spotlighted as a new flat panel display device, is similar to a cathode ray tube (CRT) in view that it displays a picture on a screen using electrons emitted. However, there is a technical difference therebetween in the point that the field emission display uses a cold electron emission, whereas the cathode ray tube uses a thermal electron emission.
A typical field emission display has some hundreds to thousands of field emission devices for emitting electrons arrayed every pixel and displays a picture on a screen by allowing electrons from the field emission devices to be impinged on an anode having a phosphor film coated thereon.
As shown in
FIG. 1
, a field emission device composing the pixel of the field emission display comprises a cathode connected to a cathode electrode (
10
), a gate (
14
) arranged at predetermined intervals on the cathode (
12
) and an anode (
18
) having a phosphor film (
16
) coated on the rear surface thereof. The phosphor film (
16
) generates lights corresponding to a quantity of electrons impinged thereon and permits a picture to be displayed on the screen. The anode (
18
) serves to attract electrons emitted from the cathode (
12
) and is made of a transparent material so that lights are projected on the phosphor film (
16
) therethrough.
Also, the cathode (
12
) is a cone shape of which the top portion forms a microtip. Electrons are emerged from the microtip under the influence of electric fields formed between the cathode (
12
) and the gate (
14
). The gate (
14
) of which voltage is lower than the voltage applied to the anode (
18
) causes electrons to be emitted from the microtip of the cathode (
12
), and the emitted electrons go toward the anode (
18
).
Now, the current to voltage characteristics of the field emission, display composed of such a conventional field emission device will be described below. As shown in
FIG. 2
, when the field emission display is driven, a cathode current is not substantially flowed until a voltage (V
G
—
C
) between the gate and the cathode reaches to “V
L
”, and thereafter when the voltage (V
G
—
C
) becomes higher than “V
L
”, a cathode current becomes sharply high as a diode's characteristic. In
FIG. 2
, “V
H
” a driving voltage applied to the: gate is approximately 100 V, and “V
L
” is about 80 V.
FIG. 3
is a block diagram explaining a driving operation of the panel in a conventional field emission display. As shown in
FIG. 3
, the panel (
20
) is a picture displaying region in which field emission devices of pixel unit as depicted in
FIG. 1
is arranged in a matrix type. A control unit (
22
) receives a control signal and an image signal from outside and outputs the corresponding control signal and image signal by controlling them so as to be suitable for the panel characteristic. A gate driver (
24
), which is connected to a plurality of gate lines, receives a control signal from the control unit (
22
) and produces a signal for scanning the corresponding gate lines. Data driver (
26
), which is connected to a plurality of data lines, converts the image signal received from the control unit (
22
) so as to be suitable for the panel characteristic and then outputs it to each pixel via the data lines.
According to
FIG. 3
, the gate driver (
24
) performs a high-voltage switching to emit electrons wherever time when a predetermined gate line is selected by the control signal of the control unit (
22
). At this time, the data driver (
26
) outputs the image signal suitable for the panel characteristic to the selected gate line. Accordingly, the desired picture is displayed on the panel.
Herein, the gate driver (
24
) or the data driver (
26
) receives a low-voltage signal from the shift register and uses a high voltage output terminal for transmitting a high voltage more than 100 V to the corresponding line. The high voltage output terminal will be described with reference to FIG.
4
.
FIG. 4
shows a circuit for driving one gate line or data line (cathode line). The circuit according to
FIG. 4
comprises a high voltage PMOS element (P
1
), a high voltage NMOS element (N
1
) and a high voltage PMOS element controller (
24
a
) for switch-controlling the high voltage PMOS element (P
1
) by means of an input signal from a control logic (not shown). A drain contact point between the high voltage PMOS element (P
1
) and the high voltage NMOS element (N
1
) is connected to the gate line (or data line) of the panel (
20
).
According to the conventional output terminal circuit having such a construction, as shown in
FIG. 5
, in accordance with the inputting of a start control signal which is shift-outputted in synchronous with a clock signal (Clk), the high voltage PMOS element (P
1
) and the high voltage NMOS (N
1
) are switched conversely and drive the gate lines (for example, n, n+1, n+2) in sequence. Herein, each gate line (n, n+1, n+2) is driven sequentially by a high voltage (V
high
) (for example, 100 V) in a rising edge or a falling edge of the clock signal (Clk)
A consumption power (P
conv
) in the outputting terminal of the conventional driver being operated as described above is represented by the following Equation 1 which indicates a consumption power (P
conv
) in the outputting terminal of the gate driver.
P
conv
=N·f·C
Load
·V
high
2
  <Equation 1>
Wherein, N is the number of the gate lines of FED panel, f is a frame frequency, C
Load
is a capacitance of one gate line, and V
high
is the width of voltage swing in the outputting terminal.
In the above Equation 1, if the width of voltage swing (V
high
) is set to 100 V, then the consumption power (P
conv
) is represented by the following Equation 2.
P
conv
=10000
·f·C
Load
  <Equation 2>
As seen from the above Equation 2, for the conventional gate driver, since the output voltage of its outputting terminal is fully swinging from 0V to V
H
(for example, 100 V), the power consumption increase, thereby causing an integrating capacity of the gate driver circuit to be reduced when integrating it. Also, there is a problem that a high heat produced by such a high power consumption deteriorates the reliability of high voltage elements. Such problems occur similarly in a driver circuit for driving cathode and anode lines.
DISCLOSURE OF THE INVENTION
Accordingly, the present invention has been made in order to solve such problems encountered in the conventional art as described above, and the object of the present invention is to provide a driving circuit for a field emission display which can reduce the power consumption and thus improve the reliability of high voltage elements by reducing the swing width of the driving voltage necessary for driving the gate, cathode and anode lines arranged to the field emission display.
In order to achieve the above object, the driving circuit for a field emission display according an embodiment of the present invention is characterized in that in a driving circuit for a field emission display having the panel on which a plurality of gate and cathode lines are arranged, the driving circuit comprises:
a first switching element arranged between any one line of the plurality of lines and a power supply terminal, for performing a switching operation;
a second switching element connected to the first switching element in serial and to any one line of the plurality of lines, for performing a switching operation;
a charge charging/discharging element for adjusting the quantity of charge in any one line, in accordance with the state of a control signal inputted thereto and the switching state of the second switching element;
a first element controller for controlling a flow of charge to any one line by switching-controlling the first switching element; and
a second element

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