Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2007-10-09
2011-12-13
Mengistu, Amare (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S098000, C345S204000
Reexamination Certificate
active
08077133
ABSTRACT:
In a driving circuit of a display device, a period for writing to pixels is shortened while an increase in size of an integrated circuit is avoided. In a first period of the writing period, the pixel is charged up with a gradation potential of a particular node in a node group that includes a node which is at an objective gradation potential. In the first period, a plurality of lines corresponding to the number of nodes included in the node group are connected in parallel between the particular node and the pixel. In a second period of the data-writing period, this parallel connection is cancelled and only the node corresponding to the objective gradation potential is connected to the pixel.
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Co-pending U.S. Appl. No. 11/762,250, filed Jun. 13, 2007.
Mengistu Amare
Oki Semiconductor Co., Ltd.
Sharifi-Tafreshi Koosha
Volentine & Whitt PLLC
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