Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2000-06-02
2003-02-25
Chang, Kent (Department: 2673)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S087000, C345S098000
Reexamination Certificate
active
06525710
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a liquid crystal display and, more particularly, to a driver of liquid crystal display, in which the driving signal applied to the two scanning lines adjacent to each other is controlled to allow one data line to send two video signal to both pixels, respectively, thereby reducing the number of the data lines by half in comparison with the conventional liquid crystal display.
2. Discussion of Related Art
A liquid crystal display generally consists of upper and lower plates and a liquid crystal being sealed between the two plates. The upper plate has a black matrix, a common electrode and R, G, and B color filter layers for displaying colors formed thereon. On the lower plate, data lines and gate lines are arranged, intersecting each other, to form pixel regions in matrix form. Each of the pixel regions includes one thin film transistor and one pixel electrode.
FIG. 1
is a cross-sectional view of a general liquid crystal display. Referring to
FIG. 1
, thin film transistors each of which consists of a gate electrode extended from a scanning line (gate line), source and drain electrodes S and D extended from a data line are arranged in matrix form on a lower plate
1
, having a predetermined distance. A pixel electrode
2
a
connected to the drain electrode D of each thin film transistor
2
is formed in each pixel region. An upper plate
3
has black matrix layers
4
formed thereon in mesh form, for blocking light transmitted to regions other than the pixel region.
2
a.
R, G, B color filters
5
for displaying colors are formed between the black matrix layers
4
. A common electrode
6
is formed on the color filters
5
and black matrix layers
4
.
FIG. 2
shows the configuration of the general conventional liquid crystal display. Referring to
FIG. 2
, the liquid crystal display includes a display panel part
21
consisting of the upper and lower plates and the liquid crystal sealed therebetween to display images, a gate driver part
22
consisting of gate drivers GD each of which applies a driving signal to the panel part
21
in row direction, and a source driver part
23
consisting of source drivers SD each of which supplied a driving signal to the panel part
21
in column direction.
There is explained below a conventional liquid crystal display and a circuit for driving the same with reference to the attached drawings.
FIG. 3
shows the configuration of the conventional liquid crystal display. Referring to
FIG. 3
, a plurality of scanning lines G
1
, G
2
, . . . , Gn−1, Gn are arranged in row direction, having a predetermined distance, and a plurality of data lines D
1
, D
2
, . . . , Dn−1, Dn are arranged, intersecting the scanning lines. A thin film transistor T
1
is formed at the portion where each scanning line intersects each data line intersect. A pixel electrode C
1c
is connected to each thin film transistor T
1
. Accordingly, a driving voltage is sequentially applied to the scanning lines to turn on the thin film transistors, and signal voltages of corresponding data lines are charged into the pixel electrodes through the turned-on thin film transistors.
FIG. 4
shows the waveform of a driving signal applied to the scanning lines of the conventional liquid crystal display. Referring to
FIG. 4
, the driving signal is sequentially applied to the scanning lines, starting from the first one G
1
to the nth one Gn during one frame, and the signal voltages of corresponding data lines are delivered to the pixel electrodes through the thin film transistors turned on by corresponding scanning lines, to thereby display an image.
FIG. 5A
shows the configuration of the source driver of the conventional liquid crystal display, and
FIG. 5B
shows the operation waveforms of the source driver. The source driver shown in
FIG. 5A
is 384-channel 6-bit driver. That is, it has R, G, and B data items each of which is 6-bit and the number of its column lines is
384
. Referring to
FIG. 5A
, the source driver includes a shift register
51
, a sampling latch
52
, a holding latch
53
, a digital/analog (D/A) converter
54
, and an amplifier
55
. The shift register
51
shifts a horizontal synchronous signal pulse HSYNC depending on a source pulse clock HCLK, to output a latch clock to the sampling latch
52
. The sampling latch
52
samples and latches the digital R, G, and B data items by column lines according to the latch clock supplied by the shift register
51
.
The holding latch
53
receives and latches the R, G, and B data items, simultaneously, latched by the sampling latch
52
in response to a load signal LD. The D/A converter
54
converts the digital R, G, B data stored in the holding latch
53
into analog R, G, and B data signals. The amplifier
55
amplifies the currents of the analog R, G, and B data signals and sends them to the data lines. That is, the digital R, G, and B data is sampled and held, converted into the analog P, G, and B data, and then current-amplified to be outputted. Here, if the holding latch
53
holds the R, G, and B data corresponding to the nth row line, the sampling latch
52
samples the R, G, and B data of the (n+1)th row line.
FIG. 6A
shows the configuration of the gate driver of the conventional liquid crystal display, and
FIG. 6B
shows the input and output waveforms of the gate driver. Referring to
FIG. 6A
, the gate driver consists of a shift register
61
, a level shifter
62
, and an output buffer
63
. The shift register
61
shifts a vertical synchronous signal pulse VSYNC depending on a gate pulse clock VCLK, to sequentially enable the scanning lines. The level shifter
62
sequentially level-shifts a signal applied to the scanning lines, to output it to the output buffer
63
. Accordingly, the plurality of scanning lines connected to the output buffer
63
are sequentially enabled.
In the conventional liquid crystal display, as described above, the driving voltage is sequentially applied to the scanning lines to turn on or off the thin film transistors each of which is connected to each data line, and signal voltages of corresponding data lines are transmitted to corresponding pixel regions through the turned on thin film transistors, to thereby display an image.
However, the aforementioned conventional liquid crystal display has the following problem. In case where the number of pixels increases in order to realize a large-sized liquid crystal display with a higher resolution, the number and the size of its drivers also increase to raise the cost. This brings about a new problem such as connection between the drivers and panel.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a driver of liquid crystal display that substantially obviate one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a driver for driving the liquid crystal display, which is able to display images with the same resolution as that of the conventional liquid crystal display while its data lines are as many as half the number of the data lines of the conventional one, resulting in cost reduction.
To accomplish the object of the present invention, there is provided a liquid crystal display having first and second plates and a liquid crystal being sealed therebetween, including: a plurality of scanning lines arranged on the first plate in one direction; a plurality of data lines arranged on the first plate, intersecting the scanning lines; first and second pixel regions, located at both sides of each data line, respectively; a first switch for selectively transmitting a video signal loaded on a corresponding data line to the first pixel region; and a second switch for selectively transmitting the video signal loaded on the data line to the second pixel region.
To accomplish the object of the present invention, there is also provided a source driver for driving a liquid crystal display, which includes: an n/3-clock shift register for shifting
Chang Kent
Schweitzer Cornman Gross & Bondell LLP
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