Driver IC packaging module and flat display device using the...

Electric lamp and discharge devices: systems – Plural power supplies – Plural cathode and/or anode load device

Reexamination Certificate

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Details

C257S668000, C345S205000

Reexamination Certificate

active

06407508

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a driver IC packaging module and a flat display device using the same.
2. Description of the Prior Art
The progress in development of the display device using the flat display panel has been notable, in recent years. In particular, since the AC PDP (Plasma Display Panel) device with the triple-electrode surface discharge structure can easily fabricated as the large-area color display panel, practical implementation and application of the AC PDP make progress in the field of the large size television, etc.
FIG. 1
is a schematic plan view showing the AC PDP device with the triple-electrode surface discharge structure and a block diagram showing a driver circuit therein.
FIG. 2
is a sectional view showing display cells in the AC PDP device.
In the AC PDP panel, a front glass substrate
101
and a rear glass substrate
102
are arranged at a distance to oppose to each other.
A plurality of display sustaining electrodes made of transparent conductive material are formed in parallel on an opposing surface of the front glass substrate
101
opposing to the rear glass substrate
102
. The sustaining electrodes consist of X electrodes x
n
(n is an integer) and Y electrodes y
n
(n is an integer), which are arranged alternatively. The sustaining voltage is applied to the X electrode x
n
and the Y electrode y
n
which partition one luminous displayed cell area
103
.
Also, a plurality of address electrodes a
m
(m is integer) are arranged on an opposing surface of the rear glass substrate
102
opposing to the front glass substrate
101
so as to intersect orthogonally with the sustaining electrodes x
n
, y
n
. A space in which one address electrode am is intersected with a set of sustaining electrodes x
n
, y
n
constitutes a single display cell
103
. Depending upon whether or not the address voltage is applied selectively to these address electrodes a
m
, either display or non-display of the display cell
103
can be selected.
The sustaining electrodes x
n
, y
n
are covered with a protection film
104
, and the address electrodes a
m
is covered with a dielectric film
105
. Insulating partitions
106
are formed on respective areas of the dielectric film
105
on both sides of the address electrodes a
m
. Red, green, or blue fluorescent material
107
is coated on a surface of the dielectric film
105
between the partitions
106
.
In this case, an inter-opposing electrode capacitance Cg is present between the address electrode am and the sustaining electrodes x
n
, y
n
, and an inter-neighboring electrode capacitance Ca is present between the address electrodes a
m
.
As shown in
FIG. 1
, principal portions of the AC PDP driver circuit comprises an address driver circuit
111
for driving the address electrodes a
m
, a scanning driver circuit
112
for driving and scanning the Y electrodes y
n
independently, a Y common driver circuit
113
for applying the sustaining voltage to the Y electrodes y
n
via the scanning driver circuit
112
, an X common driver circuit
114
for applying the sustaining voltage to the X electrodes x
n
and, a controller circuit
115
for controlling these driver circuits
111
to
114
.
The controller circuit
115
comprises a display data controller
116
for driving the address driver circuit
111
based on a clock signal CLK an d display data D supplied from external devices, a scanning driver controller
117
for driving the scanning driver circuit
112
in accordance with the horizontal synchronizing signal H
sync
and the vertical synchronizing signal V
sync
supplied from external devices and, a common driver controller
118
for driving the X common driver circuit
114
and the Y common driver circuit
113
in accordance with the horizontal synchronizing signal H
sync
and the vertical synchronizing signal V
sync
being input from external devices. The display data controller
116
has a frame memory
119
for storing display data.
In the above circuit configuration, the scanning driver circuit
112
and the address driver circuit
111
need circuits which apply selectively a driving pulse to a plurality of Y electrodes y
n
and a plurality of address electrodes a
m
. Normally, IC semiconductor devices are employed as principal circuit parts in such circuits.
For example, in the 42-inch PDP device, 480 Y electrodes y
n
are provided on the scanning side, and 2556 (852 pixel×3 (RGB)) address electrodes a
m
are provided on the address side. Thus, the drivers (driving circuits) which have output pads connected to these electrodes on a one-by-one correspondence are required.
Normally, a driver IC chip in which 64 driver elements for driving 64 electrodes are integrated is employed as such drivers.
Therefore, in most cases, 8 driver ICs are prepared for the 480 Y electrodes on the Y electrode side, and 40 driver ICs are prepared for the 2556 address electrodes on the address electrode side.
In order to incorporate a number of driver ICs into the PDP device as the driver circuits, the high density packaging technology which can provide electrical connection to a number of electrodes without fail with high reliability and can mount these small and thin driver circuits on the rear side of the display panel is requested.
For example, as shown in
FIG. 3
, the conventional PDP device has such a structure that a display panel
123
is stuck on one surface of a chassis
122
which is constructed by intersecting a plurality of beam members
120
,
121
mutually and a plurality of driver IC chips are mounted on the other surface of the chassis
122
. Each of the beam members
120
,
121
is formed as a metal rod body which has a sectional shape like a hat.
As the driver IC chip packaging structure, an approach of integrating a plurality of driver IC chips on one substrate as a module and then incorporating this module into the PDP device is adopted. As such driver IC packaging module, there are the COB (Chip On Board) structure shown in
FIGS. 4A and 4B
or the COM (Chip On Multiple Board) structure shown in
FIGS. 5A and 5B
.
As shown in
FIGS. 4A and 4B
, the COB structure comprises a printed substrate
131
, a flexible flat cable (abbreviated simply as “FFC” hereinafter)
132
which is thermocompression-bonded to one side portion of the printed substrate
131
, and a flexible substrate
133
which is thermocompression-bonded to the other side portion of the printed substrate
131
. Also, the COB structure has such a structure that a plurality of bare-chip driver ICs
130
are directly mounted on the printed substrate
131
and various pads (not shown) on the driver ICs
130
are connected to wirings
134
,
135
on the printed substrate
131
via the wire bonding. As the pads on the driver ICs
130
, there are power supply pads, input signal pads, output pads, etc.
A plurality of wirings
135
on the output side on the printed substrate
131
are connected to a plurality of wirings
136
on the flexible substrate
133
one by one by the thermocompression bonding respectively. Also, a plurality of wirings
134
on the input side on the printed substrate
131
are connected to a plurality of wirings
137
on the FFC
132
one by one by the solder respectively.
In
FIG. 4B
, a reference
138
a
denotes input signal and power supply wiring patterns of formed on a back surface of the printed substrate
131
on the input side. The wiring patterns
138
a
have a three-dimensional wiring structure which can distribute various wirings being input from the FFC
132
to a plurality of driver ICs
130
by utilizing through-holes or wiring patterns on the back surface of the substrate. In
FIG. 4B
, a reference
138
b
denotes a high voltage power supply pattern formed on the back surface on the output side,
138
c
denotes an earth pattern formed below the driver ICs
130
on the back surface, and
139
denotes a voltage power supply pattern formed on an upper surface of the printed substrate
131
.
On the contrary, as shown in
FIGS. 5A and 5B
, the COM structure compr

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