Driver control circuit

Details Driver control circuit Driver control circuit

2002-04-25

2004-02-03

Lam, David (Department: 2818)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S230060, C365S189050

Reexamination Certificate

active

06687180

ABSTRACT:

FIELD
The present invention relates generally to data processing, and more specifically to driver control circuits in memory devices.
BACKGROUND
Memory devices exist in computers and many electronic products for storing data. A typical memory device has memory banks and corresponding bank drivers. Each bank driver drives a data signal to a corresponding memory bank.
In a typical memory device, only one memory bank is selected at a time to write a data signal. In some memory devices, the drivers are arranged such that all bank drivers receive the data signal and drive it to all memory banks. After the data signal reaches the memory banks, only the selected memory bank writes the data signal. The non-selected memory banks ignore th data signal. Therefore, when only one memory bank is selected, driving the data signal to all memory banks wastes power.
SUMMARY OF THE INVENTION
Embodiments of the inventions provide circuits and methods to drive a signal to a selected memory bank of a memory, device without driving the signal to all memory banks.
In one aspect, the memory device includes a plurality of memory banks, a plurality of drivers, each of the drivers being connected to a corresponding memory bank, and a plurality of driver enable circuits connected to the drivers for activating a subset of the drivers to drive a signal to the memory banks, wherein the subset of the drivers includes fewer drivers than the total number of the drivers.
In another aspect, a method of driving a signal includes selecting a selected memory bank among a plurality of memory banks, and passing an input signal to a plurality of driver enable circuits connected to a plurality of drivers. The method also includes activating a subset of the driver enable circuits, wherein the subset of the driver enable circuits includes a number of driver enable circuits that is less than the total number of the driver enable circuits. In addition, the method includes driving the input signal from the subset of the driver enable circuits to a subset of the drivers, wherein the subset of the drivers includes a number of drivers that is less than the total number of the drivers. The method further includes driving the input signal from the subset of the drivers to the selected memory bank.


REFERENCES:
patent: 5402378 (1995-03-01), Min et al.
patent: 5848023 (1998-12-01), Kato et al.
patent: 5986938 (1999-11-01), Jang

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