Driver circuitry adjusted to allow high speed driving and reduce

Details Driver circuitry adjusted to allow high speed driving and reduce Driver circuitry adjusted to allow high speed driving and reduce

1995-12-29

1997-11-11

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Accelerating switching

327108, 327365, 327437, 326 87, H03K 1920

Patent

active

056868537

ABSTRACT:
The present invention provides a driver circuitry having a single input terminal for receiving an input signal of binary digits consisting of high and low levels, and at least first and second output terminals, wherein the input signal is varied almost linearly in a first time period so as to be shifted between high and low levels, the driver circuitry comprises first and second control circuits. The first control circuit is coupled to the input terminal for receiving the input signal. The first control circuit is also coupled to the first output terminal for outputting a first output signal of binary digits via the first output terminal. The first control circuit is biased between a high voltage line which supplies a high level of voltage and a low voltage line which supplies a low level of voltage. The first control circuit is adjusted to shift the first output signal between the high and low levels within an initial period of the first time period and then keep the first output signal at the shifted one of the low and high levels until after the first time period expired. The second control circuit is coupled to the input terminal for receiving the input signal. The second control circuit is also coupled to the second output terminal for outputting a second output signal of binary digits via the second output terminal. The second control circuit is biased between the high voltage line and the low voltage line. The second control circuit is adjusted to keep the second output signal at one level of the low and high levels at least until the time approaches the termination of the first time period and then shift the second output signal from the one level to another level within a second time period which is short as the initial period of the first time period.

REFERENCES:
patent: 5471150 (1995-11-01), Jung et al.

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