Driver circuit for driving a plasma display panel driver...

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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C345S069000, C345S204000

Reexamination Certificate

active

06480176

ABSTRACT:

CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based on and claims the benefit of priority of the prior French Application 98/12100 filed Sept. 28, 1998.
BACKGROUND OF THE INVENTION
The present invention relates generally to a driver circuit for driving a plasma display panel, a driver module incorporating the latter and to a method of testing such a module. The invention finds application in the field of manufacturing and testing plasma display panels.
A plasma display panel is formed of cells arranged in a matrix of rows (hereafter referred to as lines) and columns. A cell comprises a cavity filled with a rare gas, two drive electrodes and deposit of red, green or blue phosphor. A given cell of the display is lit by applying a high voltage, on the order of a hundred volts, between its drive electrodes. The high voltage causes the gas in the cavity to ionise and emit ultraviolet light. The light excites the deposited phosphor, causing the latter to generate a luminous point of red, green or blue light respectively.
As shown in
FIG. 1
, each cell is connected at the intersection of a line and a column. More specifically, each cell Pij is connected by a first drive electrode to a conductor line Li common to all the cells of a same line bearing the sub-index i, where i is an integer between
1
and n inclusive, and by a second drive electrode to a conductor line Cj common to all the cells of a same column bearing the sub-index j, where j is an integer between
1
and m inclusive. Each of the conductor lines is connected to the outside through a line electrode or a column electrode respectively. To give an order of size, a 50 inch screen in a 16/9 format comprises around n=1000 line electrodes and m=3000 column electrodes. The line and column electrodes are sometimes referred to respectively as horizontal and vertical electrodes.
The driver circuits produce the high voltage drive signals required to set the cells of the panel in the lit or unlit state. A drive signal has a zero or negative potential, referred to as ground potential, when in the low logic state, and a potential (or voltage with respect to ground) of around 100 to 150 volts when in the high logic state. The logic states of such signals applied to the PDP line and column electrodes determine the cells that are driven to be lit and those that are driven to be unlit. These driver circuits receive low voltage command signals at their input. A command signal has a zero potential in the low logic state and a potential (or voltage with respect to ground) of 5 volts in the high logic state.
As seen from the driver outputs, the plasma display panel electrodes can be regarded as:
a capacitor which must charged, or discharged, during an addressing sequence (i.e. when the high voltage drive signals change state); and
a current source or sink whose current must be supplied or absorbed by the driver circuit, during a sustain sequence (to maintain the lit or unlit state of the cells).
The driver outputs are thus designed to supply or absorb a current on the order of several tens of milliamps.
In practice, the lines are addressed sequentially, i.e. line by line. To this end, the line electrodes are selected one after the other by applying to them appropriate high voltage signals. Drive signals, also of high voltage, are then applied simultaneously to the column electrodes by the driver outputs. The potential differences thus generated between the drive electrodes of the cells determine their lit or unlit state. Such a sequential addressing of the PDP electrode lines is possible by the virtue of the memory effect linked to the nature of the gas in the cell cavities.
FIG. 2
shows a plasma display panel
1
and the housing
3
of a driver module. The housing contains one (or several) printed circuit(s) on which the driver circuits, generally in integrated circuit form, are mounted. These are in the form of integrated circuits each containing e.g. up to 96 driver output stages and are able to access many electrodes of the PDP. The output of each driver output stage of the module drives a column electrode. To this end, the 96 outputs of the integrated circuits are connected to their column electrodes through adapted connecting means, generally via conductive tracks etched on the printed circuit.
The plasma display panel
1
comprises a glass plate
11
mounted on a substrate
12
. The lower face of the plate
11
carries the phosphors (not shown). The line electrodes (generally designated by reference X) and the column electrodes (generally designated by reference Y) protrude from the glass plate
11
on the substrate
12
. The electrical insulation between the different elements mentioned above is provided by layers of dielectric material (not shown). The inter-electrode pitch is very small and can reach 100 &mgr;m (microns).
The driver module comprises a housing
3
, a low-voltage command signal input connector (not shown) and the aforementioned connecting means. The latter comprises a flat, flexible cable
5
having a set of parallel, mutually insulated conductive tracks at a pitch equal to that of the column electrodes, i.e. 100 &mgr;m. The flat cable
5
is more generally a flexible printed circuit on which tracks are etched (such a cable is sometimes referred to as a conductive track ribbon). It is stuck or pressed on the edge of the substrate
12
, over the column electrodes Y.
Assembling the tracks of the flat cable
5
with the column electrodes Y is very critical. Indeed, two types of fault can generally appear after this assembling operation:
a bad contact between one track of the flat cable and at least one column electrode, whereupon the cells of the corresponding column are not driven; and
a misalignment between the tracks of the flat cable and the column electrodes, whereupon a track causes a short circuit between two adjacent column electrodes.
According to manufacturers, the proportion of faults arising from a short circuit between two column electrodes is 30%, against 70% of faults arising from non-connected electrodes, referred to as open-circuit electrodes. Now, the only possibility currently used for testing the assembling of the connecting means involves powering up the plasma display panel and causing it to display a predetermined image so as to check whether the image effectively displayed corresponds to the expected image, during final testing of the fully assembled panel. This technique is reliable but suffers from certain drawbacks.
Firstly, it can only be implemented after all the electronic circuits of the panel have been assembled, including those (not shown in
FIG. 2
) for generating the low voltage command signals. This means that if there occurs a misalignment of the connecting means between the driver module and the panel, it may be necessary to take the entire panel apart to correct the assembling fault.
Secondly, there is the possibility of a driver circuit being destroyed in the event of a short circuit between two column electrodes. This means that an assembling fault in the connecting means between the panel and the driver module can make it necessary to replace an integrated circuit of the driver module and even—as is generally the case—the printed circuit board which carries that integrated circuit. Accordingly, there is a need for a driver circuit that overcomes the above drawbacks of the prior art.
SUMMARY OF THE INVENTION
An object of the present invention is to overcome some or all of the drawbacks of the prior art mentioned above.
According to the invention, a driver circuit, for driving a plasma display panel formed of cells arranged in a matrix of lines and columns, comprises a set of driver stages whose outputs are connected to line or column electrodes to which are connected a first electrode of cells of a same line or a same column, respectively, and comprising means for detecting a short circuit between the outputs of at least some of the driver output stages.
Accordingly, the driver circuit according to the invention incorporates its own means for testi

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