Driver circuit and method for controlling transition time of...

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Slope control of leading or trailing edge of rectangular or...

Reexamination Certificate

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C327S108000, C327S379000

Reexamination Certificate

active

06271699

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates, in general, to integrated circuits and, more particularly, to driver circuits for integrated circuit pads.
BACKGROUND OF THE INVENTION
Integrated circuits have metal pads for interconnection to circuitry external to the integrated circuit. The metal pads of the integrated circuit are coupled for sending and receiving input and output signals. The metal pads are the interface circuitry between circuitry external and internal to the integrated circuit.
Integrated circuits have output driver circuitry for transmitting output signals from the integrated circuit. The output driver circuitry is necessary because of capacitance loads that appear at the metal pad when the integrated circuit is interconnected with other circuitry. The output driver charges and discharges the capacitive load to a predetermined voltage level within a specified time interval.
A conventional output driver has two series connected transistors, a pull-up transistor and a pull-down transistor. The pull-up transistor is used to drive the pad to a logic high voltage level, referred to as a logic 1. The pull-down transistor is used to drive the pad to a logic low voltage level, referred to as a logic 0. For sub-micron semiconductor devices employing a conventional output driver, many factors can adversely affect the transition times, i.e., the rise and fall times, of the output signal between binary logic voltage levels. These factors include the process used for fabrication (e.g., bipolar vs. Complementary Metal Oxide Semiconductor (CMOS)), operating temperatures, load capacitance, and power supply voltages. Any variations in one of these factors, such as a change in the load capacitance, will cause the rise and fall times of the output signal to vary. The transition time of a signal is also referred to as a slew rate of the signal.
Accordingly, it would be advantageous to have an output driver for sub-micron semiconductor devices that generates output signals having controlled rise and fall times. It would be of further advantage for the output driver to be area efficient and compatible with standard semiconductor processes.


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“Design and Characterization of a CMOS Off-Chip Driver/Receiver with Reduced Power-Supply Disturbance”, Hussein I. Hanafi et al., IEEE Journal of Solid-State Ciruits, vol. 27, No. 5, May 1992, pp. 783-791.
“High-Speed, Low-Switching Noise CMOS Memory Data Output Buffer”, Ernestina Chioffi et al., IEEE Journal of Solid-State Circuits, vol. 29, No. 11, Nov. 1994, pp. 1359-1365.

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