Driver circuit

Details Driver circuit Driver circuit

2008-01-29

2008-01-29

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Amplitude control

C326S068000, C326S081000

Reexamination Certificate

active

07323923

ABSTRACT:
A driver circuit is provided for preventing generation of a pass-through current in a CMOS output unit even if a power supply voltage VDD supplied from a low voltage power supply drops below a recommended operating power supply voltage. The driver circuit includes a level shift unit having PMOS transistors and NMOS transistors, and a CMOS output unit having a PMOS transistor and an NMOS transistor. The source, drain and gate of one PMOS transistor are respectively connected to a high voltage power supply, a first contact and a second contact. The source, drain and gate of a second PMOS transistor are respectively connected to a high voltage power supply, the second contact and the first contact. The source of one NMOS transistor is grounded, the drain thereof is connected to the first contact, and the gate thereof receives a low voltage signal. The source of a second NMOS transistor is grounded, the drain thereof is connected to the second contact, and the gate thereof receives a low voltage signal. In this driver circuit, the driving current of the one PMOS transistor is higher than the driving current of the one NMOS transistor.

REFERENCES:
patent: 4973864 (1990-11-01), Nogami
patent: 5243236 (1993-09-01), McDaniel
patent: 6633285 (2003-10-01), Kigo et al.
patent: 2004/0070577 (2004-04-01), Kigo et al.
patent: 2004/0125095 (2004-07-01), Kigo et al.
patent: 2004/0125096 (2004-07-01), Kigo et al.
patent: 1-253309 (1989-10-01), None
patent: 6-091442 (1994-11-01), None
patent: 2000-164730 (2000-06-01), None
patent: 2000164730 (2000-06-01), None
English Language Abstract of JP 1-253309, Oct. 9, 1989.
English Language Abstract of JP 2000-164730, Jun. 16, 2000.

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