Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Rendering selected devices operable or inoperable
Reexamination Certificate
2009-07-22
2011-10-11
Everhart, Caridad (Department: 2895)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Rendering selected devices operable or inoperable
C438S505000, C438S480000, C257S289000, C257SE21640, C257SE29096, C257SE29093
Reexamination Certificate
active
08034669
ABSTRACT:
The drive current capability of a pull-down transistor and a pass transistor formed in a common active region may be adjusted on the basis of different strain levels obtained by providing at least one embedded semiconductor alloy in the active region, thereby providing a simplified overall geometric configuration of the active region. Hence, static RAM cells may be formed on the basis of a minimum channel length with a simplified configuration of the active region, thereby avoiding significant yield losses as may be observed in sophisticated devices, in which a pronounced variation of the transistor width is conventionally used to adjust the ratio of the drive currents for the pull-down and pass transistors.
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Griebenow Uwe
Hoentschel Jan
Advanced Micro Devices , Inc.
Everhart Caridad
Williams Morgan & Amerson P.C.
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