Drive circuit and method for controlling the cross point levels

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Signal transmission integrity or spurious noise override

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Details

327391, 327384, 327175, 326 27, 326115, H03K 1713, H03K 1716, H03K 1903

Patent

active

057035199

ABSTRACT:
A drive circuit and method for shaping the pair of complementary digital signals that drive a conventional CMOS switch are presented. The method adjusts the digital signals' duty cycles to set their cross point voltage levels so that at the cross points the voltage level at the CMOS switch's reference node is undisturbed with respect to its fully switched level. The drive circuit includes two pair of diode connected PMOS load transistors and NMOS load transistors that are connected at a pair of output terminals and a pair of switches. In one state, the NMOS load transistor is turned on while the switch cuts off its signal current so that the shaped digital signal's voltage at the output terminal is reduced to a precision limited low voltage. In the other state, the NMOS load transistor is turned off while the switch directs the signal current through the PMOS load transistor so that the shaped digital signal's voltage at the output terminal is increased to the PMOS load transistor's gate-to-source voltage. The CMOS transistors' channel geometries and the amount of signal current are selected to set the duty cycle of the shaped digital signals and thereby set the optimum cross point voltage levels.

REFERENCES:
patent: 4617523 (1986-10-01), Taylor
patent: 4777451 (1988-10-01), Tohyama
patent: 4922135 (1990-05-01), Mollier et al.
patent: 5541532 (1996-07-01), McCall
Cremonesi et al., "A 100-MHz CMOS DAC for Video-Graphic Systems", IEEE Journal of Solid-State Circuits, vol. 24, No. 3, Jun. 1989, pp. 635-639.
Bastiaansen et al., "A 10-b 40-MHz 0.8-.mu.m CMOS Current-Output D/A Converter", IEEE Journal of Solid-State Circuits, vol. 26, No. 7, Jul. 1991, pp. 917-921.

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