Draw with variable internal operation frequency

Static information storage and retrieval – Addressing

Patent

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365233, G11C 1300

Patent

active

057295000

ABSTRACT:
A DRAM to which a setting can be made to determine an internal operation frequency thereof includes a memory cell array, sense amplifiers writing data to and reading data from the memory cell array, a pair of data-bus lines, and gates connecting between the pair of data-bus lines and the sense amplifiers, the gates providing the pair of data-bus lines with access to the sense amplifiers when the gates are open. The DRAM further includes a control circuit controlling a period of the access to be a different period for a different setting of the internal operation frequency.

REFERENCES:
patent: 5084842 (1992-01-01), Tsuchida et al.

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