DRAM with multiple virtual bank architecture for random row...

Details DRAM with multiple virtual bank architecture for random row... DRAM with multiple virtual bank architecture for random row...

2005-08-02

2005-08-02

Lam, David (Department: 2827)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S230080, C365S230060

Reexamination Certificate

active

06925028

ABSTRACT:
A DRAM and access method for DRAM with a high data rate in a random row access mode. The DRAM includes a plurality of memory blocks composed of a plurality of storage segments each with a series of main word lines and sub-word lines. Each memory block is decoded into multiple segments and the main word lines are activated to select a predetermined number of sub-word lines. A corner block is provided that contains a plurality of Z-lines for selecting one of the sub-wordlines and a plurality of segment select lines for selecting a specific memory segment by activating a local Z-line.

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