DRAM with a controlled boosted voltage level shifting driver

Details DRAM with a controlled boosted voltage level shifting driver DRAM with a controlled boosted voltage level shifting driver

1991-01-14

1993-04-13

LaRoche, Eugene R.

Static information storage and retrieval

Powering

36518911, 36523006, G11C 700

Patent

active

052028550

ABSTRACT:
A DRAM contains both driver control logic and level shifting driver circuitry to generate a voltage boosted word-line signal. The driver control logic receives timing signals and row address information to provide timing control signals for the level shifting driver. The level shifting driver provides a voltage boosted word-line signal for a predetermined period of time in response to the timing control signals. Furthermore, the driver control logic provides control to the level shifting driver circuit to assure that transistors that drive the word-line signal are not damaged by voltage during a switching transition.

REFERENCES:
patent: 3976984 (1976-08-01), Hirasawa
patent: 4618785 (1986-10-01), van Tran
patent: 4787066 (1988-11-01), Leuschner
patent: 4860257 (1989-08-01), Choi
patent: 5031149 (1991-07-01), Matsumoto et al.
1990 Symposium on VLSI Circuits, "A 1.5V Circuit Technology for 64MB DRAMs" by Nakagome et al., 1990, pp. 17-18.

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