Dram using word line potential circuit control

Details Dram using word line potential circuit control Dram using word line potential circuit control

1996-06-05

1997-04-08

Nelms, David C.

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

327543, 326 88, 36523006, 36518909, G05F 316, G11C 700

Patent

active

056191626

ABSTRACT:
Memory cells including at least one memory cell having an n-channel MOS transistor and an n-channel MOS capacitor. A word line is connected to the memory cells. A word line drive circuit for driving the word line includes a p-channel MOS for transferring a potential to the word line. The word line drive circuit is controlled by a output from a word line potential control circuit. The word line potential control circuit applies a power source potential to the word line through the current path of the p-channel MOS transistor in the word line drive circuit when the memory cells are not selected, and the word line potential control circuit applies a potential higher than a potential obtained by adding a threshold voltage of the n-channel MOS transistor to the power source potential to the word line through the current path of the p-channel MOS transistor in the word line drive circuit when the memory cells are selected.

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Gillingham et al., "High-Speed, High-Reliability Circuit Design For Megabit DRAM", IEEE Journal of Solid-State Circuits, vol. 26, No. 8, Aug. 1991, pp. 1171-1175.
Kitsukawa et al., "A 23-ns 1-Mb BiCMOS DRAM", IEEE Journal of Solid-State Circuits, vol. 25, No. 5, Oct. 1990, pp. 1102-1109.

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