DRAM testing apparatus

Details DRAM testing apparatus DRAM testing apparatus

1997-07-21

1998-11-03

Elmore, Reba I.

Boots, shoes, and leggings

3241581, 209573, G06F 1900, G01R 3102

Patent

active

058318569

ABSTRACT:
A dynamic random access memory (DRAM) testing apparatus includes a substantially upright support plate on which at least one elongated feeding chute is provided, having a channel co-extensive therewith for receiving and holding therein an IC bar which contains a number of DRAMs to be tested. The DRAMs are movable downward along the channel by means of gravity. A shifting mechanism, which is controlled by a control unit, sequentially transfers the DRAMs from the feeding chute to a testing device defining a holder for receiving the DRAM to carry out the test. The test is conducted by the control unit and the test result is transmitted thereto for classifying the DRAM being tested. The tested DRAM is then forwarded to a movable member to be conveyed thereby to a particular one of a plurality of out-feeding chutes which are associated with different classifications of the DRAMs. The DRAM is then moved from the out-feeding chute to an empty IC bars to be collected therein.

REFERENCES:
patent: 4760924 (1988-08-01), Sato et al.
patent: 5686834 (1997-11-01), Okudaira et al.

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