DRAM module and method of using SRAM to replace damaged DRAM...

Static information storage and retrieval – Associative memories – Ferroelectric cell

Reexamination Certificate

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Details

C365S200000

Reexamination Certificate

active

06434033

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates in general to a dynamic random access memory (DRAM) module and a method of using a static random access memory (SRAM) to replace the damage DRAM cell in the DRAM module.
2. Description of the Related Art
In the development of the personal computer, the DRAM plays a very important role. From the early unit of kilobyte to the current unit of Megabyte, the memory capacity has been continuously expanded. Plus that the processing speed of the central processing unit (CPU) keeps increasing, the data process and operation capability of the modern computer has been greatly advanced. The capacity of DRAM is an indicate the processing capability of the CPU. With a large capacity of the DRAM, more data can be processed, and more programs can be open at a time for the computer.
FIG. 1
shows a conventional DRAM module. The data access method is described as follows. During a reading operation, the DRAM control logic circuit
20
receives an address data from a system bus
25
. The address data is decoded and compared to the address data in the DRAM
10
. When the DRAM control signal is a reading command, the DRAM puts the data of this address in the system bus
25
via the DRAM control logic circuit
20
to complete the reading operation.
In a writing operation, the DRAM control logic circuit
20
receives an address data from the system bus. The address data is decoded and compared to the address of the DRAM
10
. When the DRAM control signal is a write command, the DRAM
10
puts the data in the system bus
25
to the address via the DRAM control logic circuit
20
to complete the write operation.
However, when one of the DRAM module is damaged, error will occur in the data stored therein, or incorrect data will be stored. The whole module thus has to be abandoned and replaced by a new DRAM module to retrieve the normal operation of the computer. Or alternatively, if some of the memory cells are damaged while fabricating the DRAM in the manufacture, these damaged DRAM's with defects cannot be used to fabricate the DRAM module. The abandonment is inevitable to cost a great loss. The above conventional DRAM module cannot be applied while damaged memory cell occurs to cause a great waste.
SUMMARY OF THE INVENTION
The invention provides a DRAM module with a SRAM to replace a damaged DRAM cell, and a method of the same. The damaged address data is compared to a DRAM address data. When the damaged address data is identical to the DRAM address data, an address of a SRAM is used for data access, and an output enabling signal of the DRAM is turned off.
The above DRAM module with the SRAM to replace the damaged DRAM cell comprises at least a non-volatile memory and a DRAM control logic circuit.
The non-volatile memory is used as an initial program lead. The damaged address data are saved in an content addressable memory via a power on operation. The content addressable memory is coupled to the non-volatile memory, the DRAM, and the SRAM. While receiving the address data of the DRAM, the damaged address data are compared to the address of the DRAM to output a match signal. The DRAM control logic circuit is coupled to a system bus, the content addressable memory, the DRAM and the SRAM for receiving the address data, the DRAM control signal and the data signal. According to the DRAM control signal, the data signal is accessed in the SRAM. Or alternatively, according to address of the DRAM and the DRAM control signal, the data signal is accessed in the DRAM. In another alternative, the data signal is written in the content addressable memory according to the DRAM control signal and the address data of the DRAM.
The invention uses a SRAM to replace the damaged DRAM cell. The damaged address data is compared the to address data of the DRAM to output the match data to enable the certain address of the SRAM. Meanwhile, the output enabling signal of the DRAM is turned off.
In addition, the step of removing the surface portion of the substrate to have the substrate coplanar with the oxide layer in the trench does not damage the substrate surface around the trenches.
Both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention, as claimed.


REFERENCES:
patent: 5469390 (1995-11-01), Sasaki et al.
patent: 5640353 (1997-06-01), Ju
patent: 5778056 (1998-07-01), Barr
patent: 5996096 (1999-11-01), Dell et al.
patent: 6041422 (2000-03-01), Deas
patent: 6173238 (2001-01-01), Fujisaki

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