DRAM device with function of producing wordline drive signal bas

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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36518909, G11C 800

Patent

active

060757469

ABSTRACT:
A DRAM device includes plural cell arrays two-dimensionally arranged in column and row directions. A wordline driving section has a drive transistor in each row for transferring a charge to a corresponding cell in the plural cell arrays by raising a voltage on a wordline selected by a plural stage decode method. A first generating section generates a drive signal for driving a wordline which is supplied to the drive transistor, based on a stored charge in a capacitor. A second generating section generates a control signal for controlling the gate of the drive transistor in a chip of the DRAM device by a charge pump circuit.

REFERENCES:
patent: 5612924 (1997-03-01), Miyamoto
patent: 5619162 (1997-04-01), Ogihara
patent: 5673229 (1997-09-01), Okamura et al.
patent: 5706245 (1998-01-01), Kim
patent: 5761135 (1998-06-01), Lee
patent: 5825714 (1998-10-01), Kohno

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