Dram cell formed on an insulating layer having a buried semicond

Details Dram cell formed on an insulating layer having a buried semicond Dram cell formed on an insulating layer having a buried semicond

1988-11-07

1991-03-19

James, Andrew J.

357 234, 357 49, H01L 2968

Patent

active

050015265

ABSTRACT:
A DRAM cell structure and a manufacturing method thereof as disclosed, in which a transistor and a capacitor are formed three-dimensionally in an SOI structure. The substrate having the SOI structure is fabricated by bonding two silicon substrates sandwiching a silicon oxide layer therebetween. A plurality of pillars of silicon layers arranged in a matrix array is formed in the SOI structure by forming a trench in the silicon layers of the SOI. The lower portion of the pillar is used as a storage electrode of the capacitor and the upper portion, as active regions of the vertical transistor. In the trench, doped polysilicon is filled in a lower portion and functions as a cell plate of the capacitor, with a dielectric film being formed on the pillar surface. A gate insulating film and a gate electrode thereon are formed on the upper side surface of the pillar. The gate electrode is self-aligned, connected in the Y-direction but separated in the X-direction, and functions as a word line. A connecting line of the upper active region of the transistor functions as a bit line. Only two mask processes are needed in fabricating the DRAM cell, and isolation between adjacent cells is excellent in spite of a small cell area.

REFERENCES:
patent: 4462040 (1984-07-01), Ho et al.
patent: 4630088 (1986-12-01), Ogura et al.
patent: 4660068 (1987-04-01), Sakuma et al.
patent: 4769786 (1988-09-01), Garnache et al.
patent: 4830978 (1989-05-01), Teng et al.
Richardson et al., "A Trench Transistor Cross-Point DRAM Cell," 1985, IEDM Tech. Dig., pp. 714-717.
J. B. Lasky et al., "Silicon-On-Insulator (SOI) by Bonding and Etch-Back", IEDM Tech. Dig. 1985, pp. 684-687.
C. G. Jambotkar, "Methods to Fabricate Very Dense Arrays of Dynamic Ram Cells" IBM Technical Disclosure Bulletin, vol. 24, No. 8, Jan. 1982, pp. 4239-4243.

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