DRAM architecture with aligned data storage and bond pads

Static information storage and retrieval – Interconnection arrangements

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Details

36523003, 36523005, G11C 506

Patent

active

059954043

ABSTRACT:
A DRAM memory device has bond pads, such as DQa through DQh, arranged along the length of the substrate in a certain order. The bond pads carry data signals to and from the device with each bond pad carrying the same data bit of every data word. Arrays of memory cells 1201, 1210 extend transverse of the bond pads and are arranged in pairs of columns 1212-1226. Data circuits 1242, 1244 transmit the data signals between the bond pads and arrays. The data circuits include data lines 1230-1236 extending between the bond pads and pairs of columns of arrays. Each data line extends from one bond pad to plural pairs of columns of arrays in a sequence the same certain order.

REFERENCES:
patent: 5689465 (1997-11-01), Sukegawa et al.
patent: 5691949 (1997-11-01), Hively et al.
patent: 5712827 (1998-01-01), Ogihara et al.
patent: 5724281 (1998-03-01), Nagaba
patent: 5802005 (1998-09-01), Nakamura et al.

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