Down-converter using an on-chip bias circuit for enhancing...

Details Down-converter using an on-chip bias circuit for enhancing... Down-converter using an on-chip bias circuit for enhancing...

2006-05-23

2006-05-23

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific input to output function

Combining of plural signals

C455S326000

Reexamination Certificate

active

07049878

ABSTRACT:
A down-converter and a testing device for the down-converter are provided. The down-converter implements a Class-AB single-end input, differential output double balanced mixer structure. By introducing an on-chip bias loop, it significantly improves the symmetry and linearity of the mixer. The down-converter on-chip implements an input impedance match circuit and an open-drain output stage. By optimizing the circuit structure and each device, it achieves the objectives of a high conversion gain, high linearity, and low noise coefficient.

REFERENCES:
patent: 4216431 (1980-08-01), Shibata et al.
patent: 4479259 (1984-10-01), Fenk
patent: 6335651 (2002-01-01), Fayyaz

Affiliated with

Also associated with

Rating

Down-converter using an on-chip bias circuit for enhancing... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Down-converter using an on-chip bias circuit for enhancing..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Down-converter using an on-chip bias circuit for enhancing... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3605151