Down conversion decoding device of digital television

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

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Reexamination Certificate

active

06442201

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a digital television DTV, and more particularly to a down conversion decoding device of the DTV differentially applying a memory according to a type of a picture upon a down conversion.
2. Discussion of Related Art
Generally, a picture compressing and restoring technique for a moving picture experts group MPEG has been becoming an essential technique in the multi-media age, and has been a standard of a digital versatile disc DVD and a digital television DTV, etc.
At present, the MPEG compressing and restoring of a high definition HD degree has been considered as the standard or a real standard in the DTV.
This means that an existing analog television of NTSC, etc., is increasingly being substituted by the digital television.
However, it is estimated that demand for the analog television of a standard definition SD degree will be lasted for a long time due to a high price of the high definition television HDTV during the NTSC type analog television is completely substituted with the HDTV.
Here, the SDTV does not display a signal of the HDTV on a monitor of the HD degree, but down-converts a HD signal to display it on the popularized monitor of the SD degree. That is, it means the TV displaying (the down-converted HD signal) on the NTSC TV or a settop box, and also, it can receive the signal of the SD degree.
For example, the SDTV can lower the HD signal of a 1920×1080 60 Hz interlaced scanning method to the SD signal a 720×480 60 Hz interlaced scanning method to display it, and also, can display the SD signal of the 720×480 60 Hz interlaced scanning method without conversion.
However, the MPEG-2 is generally being used as a compressing method of the DTV signal, and the compressing method applying the MPEG-2, that is, a grand-alliance method, was adopted in U.S.A, but, the problem of this method is that the signal of the HDTV is not scalable based upon an MP@HL of the MPEG-2.
Here, the scalable picture compressing method can largely be applied in a spatial domain, a temporal domain and a signal-to-noise ratio SNR domain.
At this time, the SDTV requires a scalability in the spatial domain, which make it possible for the receiver to perform a desired reception according to the display size thereof, by adding a bit stream which compressed a different signal between the HD signal and SD signal to the SD bit stream after selecting the signal of the SD degree in signals of the HD degree to make a firstly compressed bit stream, upon compression of the HDTV signal.
Meanwhile, the signal type of the grand-alliance is not scalable and therefor, the receiver regularly performs a decoding upon displaying the HD signal to the HD degree, but, it requires a special method capable of down-converting the HD signal to the SD upon displaying the HD signal to the SD degree.
On the other hand, there is no an algorism set in the MPEG and grand-alliance standard and therefor, a TV receiver manufacturer is using his own method.
In
FIG. 1
showing a block diagram of a video decoding device of the DTV, a video decoding device
10
is formed of: a variable length decoding VLD unit
11
variable length decoding a discrete cosine transform DCT coefficients and a motion vector MV, etc., in a bit stream which was compressed and transmitted to output it; an inverse scan unit
12
inversely scanning the DCT coefficients decoded in the VLD unit
11
; an inverse quantization unit
13
inversely quantizing the inversely scanned DCT coefficients; a 8×8 inverse discrete cosine transform IDCT unit
14
performing the inverse discrete cosine transform for values inversely quantized in the inverse quantization unit
13
to output them as spatial pixel values; a frame memory unit
15
storing standard frames; a motion compensation unit
16
reading pixel values from the frame memory unit
15
to compensate movement with motion vectors MV output from the VLD unit
11
; and an adder
17
adding the value obtained from the motion compensation unit
16
and pixel value converted in the 8×8 IDCT unit
14
to decode it to an original pixel. Here, an output of the adder
17
is input to the frame memory unit
15
to be stored.
In the video decoding device
10
having the aforesaid configuration, the VLD unit
11
valid length decodes the DCT coefficient and the motion vector, etc., in the compression bit stream to be input to output them.
And, the inverse scan unit
12
inversely scans the DCT coefficients decoded in the VLD unit
11
and after that, inversely quantizes them through the inverse quantization unit
13
to output them to the 8×8 IDCT unit
14
.
The 8×8 IDCT unit
14
performs the IDCT for the inversely quantized values to transform them to the spatial values and after that, outputs the transformed values to the motion compensation unit
16
.
The motion compensation unit
16
reads pixel value from the frame memory unit
15
according to the motion vectors MV output from the VLD
11
and the frame mode to compensate the motion and after that, outputs it to the adder
17
. The adder
17
adds the value obtained from the motion compensation unit
16
and pixel value transformed in the 8×8 IDCT unit
14
to output it. At this time, an output of the adder
17
is fedback to the frame memory unit
15
to be stored.
Here, for an frame I, the motion compensation is not used and the decoding is performed only by the IDCT, but, for a P frame and a B frame, decoding performed while the motion compensation is used, together with the IDCT.
To down-convert the HD signal output from the decoding device of the DTV to the SD degree, the IDCT part and the motion compensation part are all changed, and the size of the frame memory of the frame memory unit
15
is changed according to the algorism.
Generally, the frame memory is classified into a full-memory version, a half-memory version and a quarter-memory version according to the size thereof, and each of them performs the decoding as the following Table 1.
TABLE 1
motion vector used
upon motion
IDCT
compensation
after-process
full-memory
8 × 8
(MVx, MVy)
vertical and
horizontal
filtering and
decimation
half-memory
4 × 8
(MVx/2, MVy)
vertical
filtering and
decimation
quarter-memory
4 × 4
(MVx/2, MVy/2)
unnecessary
Each memory version shown in the aforesaid Table 1 will be explained with reference to attached
FIGS. 2
to
4
.
First, in
FIG. 2
which is a block diagram of the decoding device in case of the full-memory version upon general down conversion, the decoding device of
FIG. 2
is formed of the HDTV decoder
10
, horizontal low pass filter LPF
20
, horizontal ½ down sampling unit
30
, a vertical LPF unit
40
, and a vertical ½ down sampling unit
50
.
In
FIG. 2
, when the frame memory unit
15
is the full-memory version, the HDTV decoder
10
has the configuration as shown in
FIG. 1
, and the picture of the HD degree output from the HDTV decoding unit
10
is input to the horizontal LPF unit
20
, and a low pass filtering is horizontally performed.
After that, filtered data is horizontally ½ decimated through the horizontal ½ down sampling unit
30
.
And, data horizontally decimated in half is vertically low pass filtered through the vertical LPF unit
40
and after that, is vertically decimated in half through the vertical ½ down sampling unit
50
.
At this point, the full-memory version may obtain the highest quality of video, but, since the required size of the frame memory is the same as the HDTV and also, the horizontal and vertical low pass filtering are required after the HD decoding, a hardware is more complicate than the HDTV receiver and accordingly, it is generally used only as a Benchmark comparing performance of different HDTV down conversion algorisms.
FIG. 3
is a diagram showing a down sampling operation using a general filter, and
FIG. 4
is a block diagram of the decoding device in case of the half-memory version during the general down conversion.
The h

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