Double-tuned circuit of tuner featuring restrained...

Details Double-tuned circuit of tuner featuring restrained... Double-tuned circuit of tuner featuring restrained...

2000-12-13

2002-11-26

Pascal, Robert (Department: 2817)

Tuners

Combined diverse-type tuners

C334S047000, C334S060000

Reexamination Certificate

active

06486757

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a high-frequency tuning circuit and, more particularly, to a double-tuned circuit of a television tuner that can be switched so as to permit tuning to multiple frequency bands.
2. Description of the Related Art
A conventional double-tuned circuit of a tuner will be described with reference to FIG.
10
through FIG.
12
and FIG.
4
. Referring to
FIG. 10
, the double-tuned circuit is constructed by a primary tuning circuit
51
and a secondary tuning circuit
52
. The primary tuning circuit
51
is constructed by a dc-blocking capacitor
53
and a varactor diode
54
connected in series, which are connected in parallel with a high-band receiving tuning coil
55
, a low-band receiving tuning coil
56
, a resistor
57
, a coupling coil
58
, and a dc-blocking capacitor
59
connected in series in the order shown in the drawing. The anode of the varactor diode
54
is grounded, and the cathode thereof is connected to the dc-blocking capacitor
53
. The other end of the dc-blocking capacitor
59
is also grounded. The connection point of the dc-blocking capacitor
53
and the tuning coil
55
provides an input end of the double-tuned circuit
51
, and is connected to a high-frequency amplifier
60
in the preceding stage.
Furthermore, a dc-blocking capacitor
61
, a switching diode
62
, and a dc-blocking capacitor
63
that are connected in series are provided between the connection point of the tuning coil
55
and the tuning coil
56
, and the ground. The anode of the switching diode
62
is connected to the dc-blocking capacitor
61
and the cathode thereof is connected to the dc-blocking capacitor
63
.
The connection point of the dc-blocking capacitor
61
and the switching diode
62
is connected to a high-band receiving changeover terminal
65
via a feed resistor
64
.
The connection point of the switching diode
62
and the dc-blocking capacitor
63
is connected to a low-band receiving changeover terminal
67
via a feed resistor
66
.
A bias resistor
68
is provided between the connection point of the switching diode
62
and the dc-blocking capacitor
63
, and the ground.
The connection point of the dc-blocking capacitor
53
and the varactor diode
54
is connected to a tuning voltage terminal
70
via a feed resistor
69
.
Furthermore, the secondary tuning circuit
52
is constructed by a varactor diode
71
connected in parallel to a high-band receiving tuning coil
72
, a low-band receiving tuning coil
73
, a resistor
74
, a dc-blocking capacitor
75
, the coupling ciol
58
, and the dc-blocking capacitor
59
that are connected in series in the order shown in the diagram. The anode of the varactor diode
71
is grounded, and the cathode thereof is connected to the tuning coil
72
. A varactor diode
76
and a dc-blocking capacitor
77
connected in series are connected to the connection point of the varactor diode
71
and the tuning coil
72
. The anode of the varactor diode
76
is connected to the dc-blocking capacitor
77
, and the cathode thereof is connected to the tuning coil
72
. The other end of the dc-blocking capacitor
77
provides an output end of the double-tuned circuit, and is connected to a mixer
78
in the succeeding stage. The mixer
78
receives an oscillation signal from an oscillator (not shown), and outputs an intermediate frequency signal.
A dc-blocking capacitor
79
and a switching diode
80
connected in series are provided between the connection point of the tuning coil
72
and the tuning coil
73
and the connection point of the switching diode
62
and the dc-blocking capacitor
63
. The anode of the switching diode
80
is connected to the dc-blocking capacitor
79
, and the cathode thereof is connected to the dc-blocking capacitor
63
.
The connection point of the dc-blocking capacitor
79
and the switching diode
80
is connected to the high-band receiving changeover terminal
65
via a feed resistor
81
.
The connection point of the switching diode
80
and the dc-blocking capacitor
63
is connected to the low-band receiving changeover terminal
67
via the feed resistor
66
.
The connection point of the varactor diode
71
and the tuning coil
72
is connected to the tuning voltage terminal
70
via a feed resistor
82
.
In the configuration set forth above, a voltage is applied to the high-band receiving changeover terminal
65
or the low-band receiving changeover terminal
67
to cause the switching diode
62
and the switching diode
80
to turn ON or OFF thereby to switch the double-tuned circuit between a high-band receiving mode and a low-band receiving mode.
To switch the double-tuned circuit of the tuner shown in
FIG. 10
to the mode for receiving a high-band television signal (e.g. 170 MHz to 222 MHz), a voltage of 5V, for example, is applied to the high-band receiving changeover terminal
65
, while no voltage is applied to the low-band receiving changeover terminal
67
. This causes a forward voltage to be applied to the switching diode
62
and the switching diode
80
, and both switching diodes
62
and
80
turn ON. This in turn causes the connection point of the high-band receiving tuning coil
55
and the low-band receiving tuning coil
56
to be grounded, and also causes the connection point of the high-hand receiving tuning coil
72
and the low-band receiving tuning coil
73
to be grounded. As a result, the varactor diode
54
and the high-band receiving tuning coil
55
are interconnected in parallel in the primary tuning circuit
51
, and the varactor diode
71
and the high-band receiving tuning coil
72
are interconnected in parallel in the secondary tuning circuit
52
. A high-frequency equivalent circuit at that time will be the double-tuned circuit shown in
FIG. 11
when the dc-blocking capacitor and the resistor are ignored, thus allowing a desired tuning frequency to be obtained by regulating the voltage applied to the varactor diodes
54
and
71
.
To switch the double-tuned circuit of the tuner shown in
FIG. 10
to the mode for receiving a low-band television signal (e.g. 90 MHz to 108 MHz), a voltage of 5V, for example, is applied to the low-band receiving changeover terminal
67
, while no voltage is applied to the high-band receiving changeover terminal
65
. This causes a reverse voltage to be applied to the switching diode
62
and the switching diode
80
, and both switching diodes
62
and
80
turn OFF. As a result, the primary tuning circuit
51
turns into a parallel tuning circuit (hereinafter referred to as “the main tuning circuit”) composed of the high-band receiving tuning coil
55
, the low-band receiving tuning coil
56
, the coupling coil
58
, and the varactor diode
54
. The secondary tuning circuit
52
turns into a parallel tuning circuit composed of the high-band receiving tuning coil
72
, the low-band receiving tuning coil
73
, the coupling coil
58
, and the varactor diode
71
. Thus, a desired tuning frequency can be obtained by regulating the voltage applied to the varactor diodes
54
and
71
.
In the double-tuned circuit switched to the low-band receiving mode, a reverse voltage is being applied to the switching diodes
62
and
80
. In general, when a reverse voltage is applied to a diode, an inter-terminal capacitance of, for example, approximately 0.2 pF is generated. The resistors
64
and
81
also have some inter-terminal capacitance. If the inter-terminal capacitance of the switching diodes
62
and
80
under the reverse voltage and the inter-terminal capacitance of the resistors
64
and
81
become no longer negligible, then the high-frequency equivalent circuit in the double-tuned circuit in the low-band receiving mode will be the double-tuned circuit shown in FIG.
12
.
In the example described above, the capacitors
83
,
84
,
85
, and
86
are respectively equivalent to the inter-terminal capacitance of the switching diode
62
, the switching diode
80
, the resistor
64
, and the resistor
81
.
Referring to
FIG. 12
, in the primary tuning circuit
51

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