Double triggering mechanism for achieving faster turn-on

Details Double triggering mechanism for achieving faster turn-on Double triggering mechanism for achieving faster turn-on

2000-07-27

2003-09-09

Sircus, Brian (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Transient responsive

C257S355000, C257S173000, C257S360000, C361S056000

Reexamination Certificate

active

06618233

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an electrostatic discharge (ESD) protection circuit, and, more particularly, to an ESD protection circuit having a double triggering mechanism for achieving faster turn-on.
BACKGROUND OF THE INVENTION
In digital integrated circuits which include MOS transistors, protection against electrostatic discharge (ESD) is a problem. With the development of faster circuits in which the oxide thickness in the MOS transistor is made thinner, providing adequate levels of ESD protection has become an even greater problem. Silicon controlled rectifier (SCR) devices have heretofore been used for ESD protection. A major improvement for their use in CMOS technology has been the so-called low voltage triggering SCR circuits which incorporate a NMOS transistor to provide a lower triggering voltage than the normally predominating well-to-well breakdown and triggering circuits.
FIG. 11
is a circuit diagram of a typical low-voltage triggering SCR ESD protection circuit, generally designated as
10
. The low-voltage triggering SCR circuit
10
comprises an SCR
12
and a NMOS transistor
14
connected between a Pad line
13
and a VSS line
15
. It should be understood that a typical SCR
12
, as shown in
FIG. 2
, is a body of a semiconductor material having four layers
16
,
18
,
20
and
22
. The layers arc of alternating opposite conductivity types, such as the layers
16
and
20
being of P-type conductivity and the layers
18
and
22
being of N-type conductivity. Metal contact layers
24
and
26
are on the outer layers
16
and
22
, and a metal contact
28
is on one of the inner layers, such as the layer
18
. However, the SCR can be considered as being formed of two bipolar transistors, a PNP transistor and a NPN transistor, wherein the N-type layer of the PNP transistor is common with on the N-type layers of the NPN transistor, and one of the P-type layers of the PNP transistor is common with the P-type layer of the NPN transistor. Thus, in the circuit diagram of
FIG. 1
, the SCR
12
is shown electrically as being formed of a PNP transistor
30
and a NPN transistor
32
. In the operation of the circuit, an electrostatic discharge on the pad
13
causes the MNOS transistor
14
to trigger turning on the SCR transistor
12
. This allows the electrostatic discharge to flow to the VSS line
15
which is grounded. However, a problem common with the SCR is the triggering time. Because of the double injection mechanism in the SCR
12
, two junctions have to be forward-biased. The total transit time is a function of the transit time of the NPN transistor and the transit time of the PNP transistor with the transit time of the PNP transistor being normally slower than that of the NPN transistor. Since an ESD protection circuit, particularly a SCR protection circuit, relies usually on a breakdown mechanism for its triggering, the slower transit time of the PNP transistor slows down the triggering time of the circuit. Therefore, it would be desirable to reduce the triggering time of a SCR protection circuit.
SUMMARY OF THE INVENTION
An ESD protection circuit includes a SCR connected between a Pad line and a VSS line. A switch is connected between the Pad line and the SCR. The switch is also connected to a VDD line which maintains the switch in an OFF condition under normal operation, but allows the switch to be ON during the unpowered condition. When an ESD pulse is applied to the Pad line, the switch is preconditioned in ON mode allowing the SCR to be predisposed to conduction to allow the ESD pulse to flow to the VSS line. A second switch may be connected between the SCR and VSS line.


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